Commit 138bea88eb for openssl.org
commit 138bea88eb25e88da2e2fbadc62d7a221ed31acf
Author: Madan mohan Manokar <madanmohan.manokar@amd.com>
Date: Mon Aug 31 08:39:24 2026 +0530
aes: factor out shared VAES-512 primitives
The VAES-512 AES implementation file will host more than one mode. Rename
it to a mode-neutral name ahead of adding the AES-CTR implementation and
factoring out the shared VAES-512 primitives. This commit is a pure rename
with no content change.
Refactor the VAES-512 CBC decryption code to sit on top of a small set of
shared 512-bit primitives so that additional AES modes can reuse them:
- portable compiler abstractions for ISA targeting and inlining,
- OSSL_VAES512_DEFINE_ROUNDS, a macro emitting the 1x/2x/4x parallel
512-bit AES round functions for any round count and direction,
- OSSL_VAES512_LOAD_ROUNDKEYS / OSSL_VAES512_CLEAR_ROUNDKEYS helpers,
- ossl_vaes512_cpu_capable(), a shared runtime capability check.
The generated machine code for CBC decryption is byte-identical to the
previous version. aes_platform.h grows a VAES512_ELIGIBLE base guard with
VAES_CBC_ELIGIBLE kept as an alias.
Rename the assembly cleanup helper and perlasm module from CBC-specific
names to shared aes-vaes symbols so additional modes can reuse the same
stack scrub routine.
Reviewed-by: Simo Sorce <simo@redhat.com>
Reviewed-by: Nikola Pajkovsky <nikolap@openssl.org>
Merge-date: Thu Sep 17 16:25:59 2026
Merged-from: https://github.com/openssl/openssl/pull/30755
diff --git a/crypto/aes/aes_cbc_vaes_intrinsic.c b/crypto/aes/aes_vaes512_intrinsics.c
similarity index 70%
rename from crypto/aes/aes_cbc_vaes_intrinsic.c
rename to crypto/aes/aes_vaes512_intrinsics.c
index a49b0550c8..49379eed6f 100644
--- a/crypto/aes/aes_cbc_vaes_intrinsic.c
+++ b/crypto/aes/aes_vaes512_intrinsics.c
@@ -7,16 +7,22 @@
* in the file LICENSE in the source distribution or at
* https://www.openssl.org/source/license.html
*
- * Implements AES-CBC128/192/256 decryption with VAES (AVX-512)
+ * AVX-512/VAES-512 intrinsic implementations of AES modes.
*
- * CBC encryption is inherently serial (each ciphertext block depends
- * on the previous one), so VAES provides no benefit there -- the
- * encrypt path falls back to the aesni_cbc_encrypt assembly routine.
+ * This translation unit gathers the VAES-accelerated AES mode
+ * implementations together with the shared 512-bit primitives they rely on:
+ * - portable compiler abstractions for ISA targeting and inlining,
+ * - a macro that emits 1x/2x/4x parallel 512-bit AES round functions,
+ * - macros to broadcast-load and securely scrub the round-key schedule,
+ * - a runtime CPU capability check.
*
- * CBC decryption IS parallel: all blocks can be independently decrypted,
- * then XORed with the preceding ciphertext block (or IV for the first).
- * This implementation processes 4x4=16 blocks per iteration using four
- * ZMM registers, falling back to 8, 4, then single-block processing.
+ * Currently implemented: AES-CBC decryption.
+ *
+ * CBC encryption is inherently serial (each ciphertext block depends on the
+ * previous one), so VAES provides no benefit there -- that path falls back to
+ * the aesni_cbc_encrypt assembly routine. CBC decryption is parallel: all
+ * blocks are decrypted independently, then XORed with the preceding ciphertext
+ * block (or the IV for the first).
*/
#include "internal/deprecated.h"
@@ -27,7 +33,11 @@
#include "crypto/modes.h"
#include "crypto/aes_platform.h"
-#if VAES_CBC_ELIGIBLE
+#if VAES512_ELIGIBLE
+
+#include <openssl/e_os2.h>
+#include <openssl/modes.h>
+#include <immintrin.h>
/* Function prototypes */
void ossl_aes_cbc_vaes_decrypt(const unsigned char *in, unsigned char *out,
@@ -35,9 +45,7 @@ void ossl_aes_cbc_vaes_decrypt(const unsigned char *in, unsigned char *out,
unsigned char ivec[16], int enc);
int ossl_aes_cbc_vaes_eligible(void);
-#include <openssl/modes.h>
-
-/* Forward declarations -- defined in aesni-x86_64.pl assembly */
+/* Forward declarations — defined in aesni-x86_64.pl assembly */
void aesni_cbc_encrypt(const unsigned char *in, unsigned char *out,
size_t len, const AES_KEY *key,
unsigned char *ivec, int enc);
@@ -49,23 +57,23 @@ void aesni_decrypt(const unsigned char *in, unsigned char *out,
* optimizers is what prevents the cleanup call and stores from being
* eliminated as dead. Do not replace it with a compiler-visible C function.
*/
-void ossl_aes_cbc_vaes_cleanup(void *key_schedule, size_t num_keys);
-int ossl_aes_cbc_vaes_cleanup_eligible(void);
+void ossl_aes_vaes_cleanup(void *key_schedule, size_t num_keys);
+int ossl_aes_vaes_cleanup_eligible(void);
/* Portable compiler abstractions for inlining and ISA target selection */
-#define STRINGIFY_IMPL_(a) #a
-#define STRINGIFY_(a) STRINGIFY_IMPL_(a)
+#define OSSL_VAES512_STRINGIFY_IMPL_(a) #a
+#define OSSL_VAES512_STRINGIFY_(a) OSSL_VAES512_STRINGIFY_IMPL_(a)
#ifdef __clang__
#define OPENSSL_TARGET_VAES512 \
- _Pragma(STRINGIFY_(clang attribute push( \
+ _Pragma(OSSL_VAES512_STRINGIFY_(clang attribute push( \
__attribute__((target("avx512f,avx512dq,avx512bw,vaes,aes"))), \
apply_to = function)))
#define OPENSSL_UNTARGET_VAES512 _Pragma("clang attribute pop")
#elif defined(__GNUC__)
#define OPENSSL_TARGET_VAES512 \
_Pragma("GCC push_options") \
- _Pragma(STRINGIFY_(GCC target("avx512f,avx512dq,avx512bw,vaes,aes")))
+ _Pragma(OSSL_VAES512_STRINGIFY_(GCC target("avx512f,avx512dq,avx512bw,vaes,aes")))
#define OPENSSL_UNTARGET_VAES512 _Pragma("GCC pop_options")
#else
/* MSVC: all intrinsics are always available via <immintrin.h>. */
@@ -84,92 +92,124 @@ int ossl_aes_cbc_vaes_cleanup_eligible(void);
#define OSSL_FUNC_NOINLINE
#endif
-#include <immintrin.h>
+/*
+ * Runtime CPU capability check shared by all VAES-512 mode helpers.
+ * Uses only OPENSSL_ia32cap_P bit tests, so it requires no special ISA
+ * target and is safe to define outside an OPENSSL_TARGET_VAES512 region.
+ */
+static ossl_inline int ossl_vaes512_cpu_capable(void)
+{
+ return (OPENSSL_ia32cap_P[2] & (1 << 16)) /* AVX512F */
+ && (OPENSSL_ia32cap_P[2] & (1 << 17)) /* AVX512DQ */
+ && (OPENSSL_ia32cap_P[2] & (1 << 30)) /* AVX512BW */
+ && (OPENSSL_ia32cap_P[3] & (1 << 9)); /* AVX512VAES */
+}
-OPENSSL_TARGET_VAES512
+/*
+ * Emit the 1x/2x/4x parallel 512-bit AES round functions for a given round
+ * count. TAG names the generated functions (e.g. AesEnc, AesDec); AESOP and
+ * AESLAST select the middle-round and last-round intrinsics (encrypt vs
+ * decrypt). Each __m512i packs four independent 128-bit AES blocks, and
+ * always_inline keeps the round keys resident in ZMM registers.
+ *
+ * Must be expanded inside an OPENSSL_TARGET_VAES512 region.
+ */
+#define OSSL_VAES512_DEFINE_ROUNDS(TAG, ROUNDS, AESOP, AESLAST) \
+ OSSL_FUNC_ALWAYS_INLINE \
+ void TAG##_4x512_##ROUNDS( \
+ __m512i *b1, __m512i *b2, __m512i *b3, __m512i *b4, \
+ const __m512i *rk) \
+ { \
+ *b1 = _mm512_xor_si512(*b1, rk[0]); \
+ *b2 = _mm512_xor_si512(*b2, rk[0]); \
+ *b3 = _mm512_xor_si512(*b3, rk[0]); \
+ *b4 = _mm512_xor_si512(*b4, rk[0]); \
+ for (int i = 1; i < ROUNDS; i++) { \
+ *b1 = AESOP(*b1, rk[i]); \
+ *b2 = AESOP(*b2, rk[i]); \
+ *b3 = AESOP(*b3, rk[i]); \
+ *b4 = AESOP(*b4, rk[i]); \
+ } \
+ *b1 = AESLAST(*b1, rk[ROUNDS]); \
+ *b2 = AESLAST(*b2, rk[ROUNDS]); \
+ *b3 = AESLAST(*b3, rk[ROUNDS]); \
+ *b4 = AESLAST(*b4, rk[ROUNDS]); \
+ } \
+ \
+ OSSL_FUNC_ALWAYS_INLINE \
+ void TAG##_2x512_##ROUNDS( \
+ __m512i *b1, __m512i *b2, const __m512i *rk) \
+ { \
+ *b1 = _mm512_xor_si512(*b1, rk[0]); \
+ *b2 = _mm512_xor_si512(*b2, rk[0]); \
+ for (int i = 1; i < ROUNDS; i++) { \
+ *b1 = AESOP(*b1, rk[i]); \
+ *b2 = AESOP(*b2, rk[i]); \
+ } \
+ *b1 = AESLAST(*b1, rk[ROUNDS]); \
+ *b2 = AESLAST(*b2, rk[ROUNDS]); \
+ } \
+ \
+ OSSL_FUNC_ALWAYS_INLINE \
+ void TAG##_1x512_##ROUNDS( \
+ __m512i *b1, const __m512i *rk) \
+ { \
+ *b1 = _mm512_xor_si512(*b1, rk[0]); \
+ for (int i = 1; i < ROUNDS; i++) \
+ *b1 = AESOP(*b1, rk[i]); \
+ *b1 = AESLAST(*b1, rk[ROUNDS]); \
+ }
-/* ------------------------------------------------------------------ */
-/* AES decryption helpers: 1x, 2x, 4x parallel 512-bit blocks */
-/* Each 512-bit register holds 4 independent 128-bit AES blocks. */
-/* always_inline guarantees the compiler keeps keys in ZMM regs. */
-/* ------------------------------------------------------------------ */
+/* Emit the AES decryption round helpers (used by CBC decrypt). */
+#define OSSL_VAES512_DEFINE_DECRYPT(ROUNDS) \
+ OSSL_VAES512_DEFINE_ROUNDS(AesDec, ROUNDS, \
+ _mm512_aesdec_epi128, _mm512_aesdeclast_epi128)
-#define DEFINE_AES_DECRYPT_FUNCS(ROUNDS) \
- OSSL_FUNC_ALWAYS_INLINE \
- void AesDec_4x512_##ROUNDS( \
- __m512i *b1, __m512i *b2, __m512i *b3, __m512i *b4, \
- const __m512i *rk) \
- { \
- *b1 = _mm512_xor_si512(*b1, rk[0]); \
- *b2 = _mm512_xor_si512(*b2, rk[0]); \
- *b3 = _mm512_xor_si512(*b3, rk[0]); \
- *b4 = _mm512_xor_si512(*b4, rk[0]); \
- for (int i = 1; i < ROUNDS; i++) { \
- *b1 = _mm512_aesdec_epi128(*b1, rk[i]); \
- *b2 = _mm512_aesdec_epi128(*b2, rk[i]); \
- *b3 = _mm512_aesdec_epi128(*b3, rk[i]); \
- *b4 = _mm512_aesdec_epi128(*b4, rk[i]); \
- } \
- *b1 = _mm512_aesdeclast_epi128(*b1, rk[ROUNDS]); \
- *b2 = _mm512_aesdeclast_epi128(*b2, rk[ROUNDS]); \
- *b3 = _mm512_aesdeclast_epi128(*b3, rk[ROUNDS]); \
- *b4 = _mm512_aesdeclast_epi128(*b4, rk[ROUNDS]); \
- } \
- \
- OSSL_FUNC_ALWAYS_INLINE \
- void AesDec_2x512_##ROUNDS( \
- __m512i *b1, __m512i *b2, const __m512i *rk) \
- { \
- *b1 = _mm512_xor_si512(*b1, rk[0]); \
- *b2 = _mm512_xor_si512(*b2, rk[0]); \
- for (int i = 1; i < ROUNDS; i++) { \
- *b1 = _mm512_aesdec_epi128(*b1, rk[i]); \
- *b2 = _mm512_aesdec_epi128(*b2, rk[i]); \
- } \
- *b1 = _mm512_aesdeclast_epi128(*b1, rk[ROUNDS]); \
- *b2 = _mm512_aesdeclast_epi128(*b2, rk[ROUNDS]); \
- } \
- \
- OSSL_FUNC_ALWAYS_INLINE \
- void AesDec_1x512_##ROUNDS( \
- __m512i *b1, const __m512i *rk) \
- { \
- *b1 = _mm512_xor_si512(*b1, rk[0]); \
- for (int i = 1; i < ROUNDS; i++) \
- *b1 = _mm512_aesdec_epi128(*b1, rk[i]); \
- *b1 = _mm512_aesdeclast_epi128(*b1, rk[ROUNDS]); \
- }
+/*
+ * Broadcast-load the AES round-key schedule into an array of ZMM registers,
+ * replicating each 128-bit round key across all four lanes. key is an
+ * AES_KEY *, rk an array of at least NR+1 __m512i.
+ *
+ * Must be expanded inside an OPENSSL_TARGET_VAES512 region.
+ */
+#define OSSL_VAES512_LOAD_ROUNDKEYS(rk, key, NR) \
+ do { \
+ const unsigned char *rk_bytes_ = (const unsigned char *)(key)->rd_key; \
+ for (int i_ = 0; i_ <= (NR); i_++) { \
+ __m128i t_ = _mm_loadu_si128( \
+ (const __m128i *)(rk_bytes_ + i_ * 16)); \
+ (rk)[i_] = _mm512_broadcast_i32x4(t_); \
+ } \
+ } while (0)
-DEFINE_AES_DECRYPT_FUNCS(10) /* AES-128 */
-DEFINE_AES_DECRYPT_FUNCS(12) /* AES-192 */
-DEFINE_AES_DECRYPT_FUNCS(14) /* AES-256 */
+OPENSSL_TARGET_VAES512
-/* ------------------------------------------------------------------ */
-/* CBC-mode decryption -- templated per round count */
-/* */
-/* Processes as many full blocks as possible: */
-/* 16 blocks at a time (4 x zmm = 4 x 4 = 16 blocks) */
-/* 8 blocks at a time (2 x zmm) */
-/* 4 blocks at a time (1 x zmm) */
-/* 1 block at a time for the remaining 0-3 blocks */
-/* */
-/* The chaining vector b1 packs [prev_ct[last] | ct[0] | ct[1] */
-/* | ct[2]] so that a single XOR after decryption applies the CBC */
-/* feedback to all four lanes simultaneously. */
-/* ------------------------------------------------------------------ */
+/* AES decryption round helpers (1x/2x/4x parallel 512-bit blocks). */
+OSSL_VAES512_DEFINE_DECRYPT(10) /* AES-128 */
+OSSL_VAES512_DEFINE_DECRYPT(12) /* AES-192 */
+OSSL_VAES512_DEFINE_DECRYPT(14) /* AES-256 */
+/*-
+ * CBC-mode decryption -- templated per round count.
+ *
+ * Processes as many full blocks as possible:
+ * 16 blocks at a time (4 x zmm = 4 x 4 = 16 blocks)
+ * 8 blocks at a time (2 x zmm)
+ * 4 blocks at a time (1 x zmm)
+ * 1 block at a time for the remaining 0-3 blocks
+ *
+ * The chaining vector b1 packs [prev_ct[last] | ct[0] | ct[1] | ct[2]] so
+ * that a single XOR after decryption applies the CBC feedback to all four
+ * lanes simultaneously.
+ */
#define DEFINE_CBC_DECRYPT(NR) \
OSSL_FUNC_NOINLINE \
static void cbc_decrypt_##NR( \
const unsigned char *in, unsigned char *out, size_t len, \
const AES_KEY *key, unsigned char *iv) \
{ \
- const unsigned char *rk_bytes = (const unsigned char *)key->rd_key; \
__m512i rk[NR + 1]; \
- for (int i = 0; i <= NR; i++) { \
- __m128i t = _mm_loadu_si128((const __m128i *)(rk_bytes + i * 16)); \
- rk[i] = _mm512_broadcast_i32x4(t); \
- } \
+ OSSL_VAES512_LOAD_ROUNDKEYS(rk, key, NR); \
\
__m512i a1, a2, a3, a4; \
__m512i b1, b2, b3, b4; \
@@ -323,17 +363,14 @@ DEFINE_AES_DECRYPT_FUNCS(14) /* AES-256 */
_mm_storeu_si128((__m128i *)iv, saved_iv); \
\
/* Erase the broadcast schedule and the volatile vector register bank. */ \
- ossl_aes_cbc_vaes_cleanup(rk, NR + 1); \
+ ossl_aes_vaes_cleanup(rk, NR + 1); \
}
DEFINE_CBC_DECRYPT(10) /* AES-128 */
DEFINE_CBC_DECRYPT(12) /* AES-192 */
DEFINE_CBC_DECRYPT(14) /* AES-256 */
-/* ------------------------------------------------------------------ */
-/* Public entry point */
-/* ------------------------------------------------------------------ */
-
+/* Public entry point. */
void ossl_aes_cbc_vaes_decrypt(const unsigned char *in, unsigned char *out,
size_t len, const void *key,
unsigned char ivec[16], int enc)
@@ -369,25 +406,13 @@ void ossl_aes_cbc_vaes_decrypt(const unsigned char *in, unsigned char *out,
}
}
-/* ------------------------------------------------------------------ */
-/* CPU feature check */
-/* ------------------------------------------------------------------ */
-
+/* CPU feature check. */
int ossl_aes_cbc_vaes_eligible(void)
{
- return ossl_aes_cbc_vaes_cleanup_eligible()
- && (OPENSSL_ia32cap_P[2] & (1 << 16)) /* AVX512F */
- && (OPENSSL_ia32cap_P[2] & (1 << 17)) /* AVX512DQ */
- && (OPENSSL_ia32cap_P[2] & (1 << 30)) /* AVX512BW */
- && (OPENSSL_ia32cap_P[3] & (1 << 9)); /* AVX512VAES */
+ return ossl_aes_vaes_cleanup_eligible()
+ && ossl_vaes512_cpu_capable();
}
OPENSSL_UNTARGET_VAES512
-#undef OPENSSL_TARGET_VAES512
-#undef OPENSSL_UNTARGET_VAES512
-#undef STRINGIFY_IMPL_
-#undef STRINGIFY_
-#undef OSSL_FUNC_ALWAYS_INLINE
-#undef OSSL_FUNC_NOINLINE
-#endif /* VAES_CBC_ELIGIBLE */
+#endif /* VAES512_ELIGIBLE */
diff --git a/crypto/aes/asm/aes-cbc-vaes-x86_64.pl b/crypto/aes/asm/aes-vaes-x86_64.pl
similarity index 78%
rename from crypto/aes/asm/aes-cbc-vaes-x86_64.pl
rename to crypto/aes/asm/aes-vaes-x86_64.pl
index 8bd84d838f..772c47924d 100644
--- a/crypto/aes/asm/aes-cbc-vaes-x86_64.pl
+++ b/crypto/aes/asm/aes-vaes-x86_64.pl
@@ -6,8 +6,8 @@
# in the file LICENSE in the source distribution or at
# https://www.openssl.org/source/license.html
-# Erase the temporary broadcast key schedule used by the AES-CBC VAES
-# intrinsic implementation and clear its caller-clobbered register state.
+# Erase the temporary broadcast key schedule used by the AES VAES
+# intrinsic implementations and clear their caller-clobbered register state.
$output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
$flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
@@ -66,11 +66,11 @@ $num_keys = $win64 ? "%rdx" : "%rsi";
$code = <<___;
.text
-.globl ossl_aes_cbc_vaes_cleanup_eligible
-.hidden ossl_aes_cbc_vaes_cleanup_eligible
-.type ossl_aes_cbc_vaes_cleanup_eligible,\@abi-omnipotent
+.globl ossl_aes_vaes_cleanup_eligible
+.hidden ossl_aes_vaes_cleanup_eligible
+.type ossl_aes_vaes_cleanup_eligible,\@abi-omnipotent
.align 16
-ossl_aes_cbc_vaes_cleanup_eligible:
+ossl_aes_vaes_cleanup_eligible:
.cfi_startproc
endbranch
___
@@ -80,32 +80,32 @@ if ($avx512vaes) {
mov \$1,%eax
ret
.cfi_endproc
-.size ossl_aes_cbc_vaes_cleanup_eligible,.-ossl_aes_cbc_vaes_cleanup_eligible
+.size ossl_aes_vaes_cleanup_eligible,.-ossl_aes_vaes_cleanup_eligible
-# void ossl_aes_cbc_vaes_cleanup(void *key_schedule, size_t num_keys);
+# void ossl_aes_vaes_cleanup(void *key_schedule, size_t num_keys);
#
# num_keys counts 64-byte broadcast round keys. The caller invokes this only
# after VAES use, so AVX-512 instructions are already safe to execute.
# On Win64, the caller's epilogue restores the ABI-preserved low 128 bits of
# XMM6-XMM15 if it used them. Their volatile upper lanes are cleared here.
-.globl ossl_aes_cbc_vaes_cleanup
-.hidden ossl_aes_cbc_vaes_cleanup
-.type ossl_aes_cbc_vaes_cleanup,\@abi-omnipotent
+.globl ossl_aes_vaes_cleanup
+.hidden ossl_aes_vaes_cleanup
+.type ossl_aes_vaes_cleanup,\@abi-omnipotent
.align 32
-ossl_aes_cbc_vaes_cleanup:
+ossl_aes_vaes_cleanup:
.cfi_startproc
endbranch
vpxord %zmm0,%zmm0,%zmm0
test $num_keys,$num_keys
- jz .Lvaes_cbc_clear_registers
+ jz .Lvaes_clear_registers
-.Lvaes_cbc_clear_keys:
+.Lvaes_clear_keys:
vmovdqu64 %zmm0,($key_schedule)
add \$64,$key_schedule
dec $num_keys
- jnz .Lvaes_cbc_clear_keys
+ jnz .Lvaes_clear_keys
-.Lvaes_cbc_clear_registers:
+.Lvaes_clear_registers:
___
if ($win64) {
@@ -157,25 +157,25 @@ ___
$code .= <<___;
ret
.cfi_endproc
-.size ossl_aes_cbc_vaes_cleanup,.-ossl_aes_cbc_vaes_cleanup
+.size ossl_aes_vaes_cleanup,.-ossl_aes_vaes_cleanup
___
} else {
$code .= <<___;
xor %eax,%eax
ret
.cfi_endproc
-.size ossl_aes_cbc_vaes_cleanup_eligible,.-ossl_aes_cbc_vaes_cleanup_eligible
+.size ossl_aes_vaes_cleanup_eligible,.-ossl_aes_vaes_cleanup_eligible
-.globl ossl_aes_cbc_vaes_cleanup
-.hidden ossl_aes_cbc_vaes_cleanup
-.type ossl_aes_cbc_vaes_cleanup,\@abi-omnipotent
-ossl_aes_cbc_vaes_cleanup:
+.globl ossl_aes_vaes_cleanup
+.hidden ossl_aes_vaes_cleanup
+.type ossl_aes_vaes_cleanup,\@abi-omnipotent
+ossl_aes_vaes_cleanup:
.cfi_startproc
endbranch
.byte 0x0f,0x0b # ud2
ret
.cfi_endproc
-.size ossl_aes_cbc_vaes_cleanup,.-ossl_aes_cbc_vaes_cleanup
+.size ossl_aes_vaes_cleanup,.-ossl_aes_vaes_cleanup
___
}
diff --git a/crypto/aes/build.info b/crypto/aes/build.info
index 47d6bcdd78..86640dadbf 100644
--- a/crypto/aes/build.info
+++ b/crypto/aes/build.info
@@ -10,7 +10,7 @@ IF[{- !$disabled{asm} -}]
$AESASM_x86_64=\
aes-x86_64.s vpaes-x86_64.s bsaes-x86_64.s aesni-x86_64.s \
aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s \
- aesni-xts-avx512.s aes-cfb-avx512.s aes-cbc-vaes-x86_64.s
+ aesni-xts-avx512.s aes-cfb-avx512.s aes-vaes-x86_64.s
$AESDEF_x86_64=AES_ASM VPAES_ASM BSAES_ASM
$AESASM_ia64=aes_core.c aes_cbc.c aes-ia64.s
@@ -74,11 +74,11 @@ IF[{- !$disabled{asm} -}]
ENDIF
$COMMON=aes_misc.c aes_ecb.c $AESASM
-SOURCE[../../libcrypto]=$COMMON aes_cfb.c aes_ofb.c aes_wrap.c aes_cbc_vaes_intrinsic.c
+SOURCE[../../libcrypto]=$COMMON aes_cfb.c aes_ofb.c aes_wrap.c aes_vaes512_intrinsics.c
IF[{- !$disabled{'deprecated-3.0'} -}]
SOURCE[../../libcrypto]=aes_ige.c
ENDIF
-SOURCE[../../providers/libfips.a]=$COMMON aes_cbc_vaes_intrinsic.c
+SOURCE[../../providers/libfips.a]=$COMMON aes_vaes512_intrinsics.c
# Implementations are now spread across several libraries, so the defines
# need to be applied to all affected libraries and modules.
@@ -108,7 +108,7 @@ GENERATE[vpaes-x86_64.s]=asm/vpaes-x86_64.pl
GENERATE[bsaes-x86_64.s]=asm/bsaes-x86_64.pl
GENERATE[aesni-x86_64.s]=asm/aesni-x86_64.pl
GENERATE[aes-cfb-avx512.s]=asm/aes-cfb-avx512.pl
-GENERATE[aes-cbc-vaes-x86_64.s]=asm/aes-cbc-vaes-x86_64.pl
+GENERATE[aes-vaes-x86_64.s]=asm/aes-vaes-x86_64.pl
GENERATE[aesni-sha1-x86_64.s]=asm/aesni-sha1-x86_64.pl
GENERATE[aesni-sha256-x86_64.s]=asm/aesni-sha256-x86_64.pl
GENERATE[aesni-mb-x86_64.s]=asm/aesni-mb-x86_64.pl
diff --git a/include/crypto/aes_platform.h b/include/crypto/aes_platform.h
index 6c0d0258e4..b0273e9c7d 100644
--- a/include/crypto/aes_platform.h
+++ b/include/crypto/aes_platform.h
@@ -189,11 +189,13 @@ void gcm_ghash_v8(uint64_t Xi[2], const u128 Htable[16], const uint8_t *inp, siz
&& ((defined(__GNUC__) && !defined(__clang__) && (__GNUC__ >= 8)) \
|| (defined(__clang__) && (__clang_major__ >= 7)) \
|| (defined(_MSC_VER) && (_MSC_VER >= 1927)))
-#define VAES_CBC_ELIGIBLE 1
+#define VAES512_ELIGIBLE 1
#else
-#define VAES_CBC_ELIGIBLE 0
+#define VAES512_ELIGIBLE 0
#endif
+#define VAES_CBC_ELIGIBLE VAES512_ELIGIBLE
+
#if VAES_CBC_ELIGIBLE
void ossl_aes_cbc_vaes_decrypt(const unsigned char *in, unsigned char *out,
size_t len, const void *key, unsigned char ivec[16], int enc);