Commit 65f904c907 for qemu.org

commit 65f904c90718cb29017c01a892a3b6c6603b03cf
Author: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Date:   Sat Oct 24 16:32:48 2026 +0000

    target/rx: remove explicit target specific prefix

    Now that we have a generic mechanism to prefix all helpers, we can undo the
    recent changes that fixed conflicts between targets in multi-target set.

    This reverts commit 5490e0e4a5dcada1aabfc7df772ddee54f9022c5
    "target/rx: prefix helpers conflicting with other arch"

    Acked-by: Yonggang Luo <luoyonggang@gmail.com>
    Reviewed-by: Anton Johansson <anjo@rev.ng>
    Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
    Link: https://lore.kernel.org/qemu-devel/20261024163249.77855-11-pierrick.bouvier@oss.qualcomm.com
    Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>

diff --git a/target/rx/helper.h b/target/rx/helper.h
index 13f019ff81..f3897ce761 100644
--- a/target/rx/helper.h
+++ b/target/rx/helper.h
@@ -3,11 +3,11 @@ DEF_HELPER_1(raise_access_fault, noreturn, env)
 DEF_HELPER_1(raise_privilege_violation, noreturn, env)
 DEF_HELPER_1(wait, noreturn, env)
 DEF_HELPER_2(trap, noreturn, env, i32)
-DEF_HELPER_3(rx_fadd, f32, env, f32, f32)
-DEF_HELPER_3(rx_fsub, f32, env, f32, f32)
-DEF_HELPER_3(rx_fmul, f32, env, f32, f32)
-DEF_HELPER_3(rx_fdiv, f32, env, f32, f32)
-DEF_HELPER_3(rx_fcmp, void, env, f32, f32)
+DEF_HELPER_3(fadd, f32, env, f32, f32)
+DEF_HELPER_3(fsub, f32, env, f32, f32)
+DEF_HELPER_3(fmul, f32, env, f32, f32)
+DEF_HELPER_3(fdiv, f32, env, f32, f32)
+DEF_HELPER_3(fcmp, void, env, f32, f32)
 DEF_HELPER_2(ftoi, i32, env, f32)
 DEF_HELPER_2(round, i32, env, f32)
 DEF_HELPER_2(itof, f32, env, i32)
@@ -17,7 +17,7 @@ DEF_HELPER_2(set_psw_rte, void, env, i32)
 DEF_HELPER_2(set_psw, void, env, i32)
 DEF_HELPER_1(pack_psw, i32, env)
 DEF_HELPER_3(div, i32, env, i32, i32)
-DEF_HELPER_3(rx_divu, i32, env, i32, i32)
+DEF_HELPER_3(divu, i32, env, i32, i32)
 DEF_HELPER_1(scmpu, void, env)
 DEF_HELPER_1(smovu, void, env)
 DEF_HELPER_1(smovf, void, env)
diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
index 5f4f0a1402..1281d69c46 100644
--- a/target/rx/op_helper.c
+++ b/target/rx/op_helper.c
@@ -147,12 +147,12 @@ void HELPER(set_fpsw)(CPURXState *env, uint32_t val)
         return ret;                                                 \
     }

-FLOATOP(rx_fadd, float32_add)
-FLOATOP(rx_fsub, float32_sub)
-FLOATOP(rx_fmul, float32_mul)
-FLOATOP(rx_fdiv, float32_div)
+FLOATOP(fadd, float32_add)
+FLOATOP(fsub, float32_sub)
+FLOATOP(fmul, float32_mul)
+FLOATOP(fdiv, float32_div)

-void HELPER(rx_fcmp)(CPURXState *env, float32 t0, float32 t1)
+void HELPER(fcmp)(CPURXState *env, float32 t0, float32 t1)
 {
     int st;
     st = float32_compare(t0, t1, &env->fp_status);
@@ -407,7 +407,7 @@ uint32_t HELPER(div)(CPURXState *env, uint32_t num, uint32_t den)
     return ret;
 }

-uint32_t HELPER(rx_divu)(CPURXState *env, uint32_t num, uint32_t den)
+uint32_t HELPER(divu)(CPURXState *env, uint32_t num, uint32_t den)
 {
     uint32_t ret = num;
     if (den != 0) {
diff --git a/target/rx/translate.c b/target/rx/translate.c
index a350f6b4d2..1bacc7adf9 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -1252,7 +1252,7 @@ static void rx_div(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)

 static void rx_divu(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 {
-    gen_helper_rx_divu(ret, tcg_env, arg1, arg2);
+    gen_helper_divu(ret, tcg_env, arg1, arg2);
 }

 /* div #imm, rd */
@@ -1864,16 +1864,16 @@ static bool trans_SATR(DisasContext *ctx, arg_SATR *a)
         return true;                                            \
     }

-FOP(FADD, rx_fadd)
-FOP(FSUB, rx_fsub)
-FOP(FMUL, rx_fmul)
-FOP(FDIV, rx_fdiv)
+FOP(FADD, fadd)
+FOP(FSUB, fsub)
+FOP(FMUL, fmul)
+FOP(FDIV, fdiv)

 /* fcmp #imm, rd */
 static bool trans_FCMP_ir(DisasContext *ctx, arg_FCMP_ir * a)
 {
     TCGv_i32 imm = tcg_constant_i32(li(ctx, 0));
-    gen_helper_rx_fcmp(tcg_env, cpu_regs[a->rd], imm);
+    gen_helper_fcmp(tcg_env, cpu_regs[a->rd], imm);
     return true;
 }

@@ -1884,7 +1884,7 @@ static bool trans_FCMP_mr(DisasContext *ctx, arg_FCMP_mr *a)
     TCGv_i32 val, mem;
     mem = tcg_temp_new_i32();
     val = rx_load_source(ctx, mem, a->ld, MO_32, a->rs);
-    gen_helper_rx_fcmp(tcg_env, cpu_regs[a->rd], val);
+    gen_helper_fcmp(tcg_env, cpu_regs[a->rd], val);
     return true;
 }