Commit 8b65a111a8 for ffmpeg

commit 8b65a111a8660e4703feaee93480a002c12eddb3
Author: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
Date:   Thu Nov 5 19:43:33 2026 +0100

    avcodec/x86/vp8dsp: Don't use MMX regs in bilinear mc

    Improves performance a bit for the horizontal case:

    Old benchmarks:
      vp8_put_bilin4_h_c:          71.5
      vp8_put_bilin4_h_ssse3:      16.6 ( 4.27x)
      vp8_put_bilin4_hv_c:         99.8
      vp8_put_bilin4_hv_ssse3:     64.8 ( 1.48x)
      vp8_put_bilin4_v_c:          41.1
      vp8_put_bilin4_v_ssse3:      37.6 ( 0.95x)

    New benchmarks:
      vp8_put_bilin4_h_c:          70.2
      vp8_put_bilin4_h_ssse3:      12.5 ( 5.58x)
      vp8_put_bilin4_hv_c:        100.4
      vp8_put_bilin4_hv_ssse3:     64.0 ( 1.49x)
      vp8_put_bilin4_v_c:          41.1
      vp8_put_bilin4_v_ssse3:      37.7 ( 0.93x)

    Reviewed-by: Lynne <dev@lynne.ee>
    Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>

diff --git a/libavcodec/x86/vp8dsp.asm b/libavcodec/x86/vp8dsp.asm
index 825e64880f..65b7d5a82c 100644
--- a/libavcodec/x86/vp8dsp.asm
+++ b/libavcodec/x86/vp8dsp.asm
@@ -146,7 +146,8 @@ filter_h6_shuf1: db 0, 3, 1, 4, 2, 5, 3, 6, 4, 7, 5,  8, 6,  9, 7, 10
 filter_h6_shuf2: db 1, 4, 2, 5, 3, 6, 4, 7, 5, 8, 6,  9, 7, 10, 8, 11
 filter_h6_shuf3: db 2, 5, 3, 6, 4, 7, 5, 8, 6, 9, 7, 10, 8, 11, 9, 12

-filter_h2_shuf:  db 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5,  6, 6,  7, 7,  8
+filter_h2_shuf:  db 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5,  6,  6,  7,  7,  8
+filter_h2_shuf2: db 0, 1, 1, 2, 2, 3, 3, 4, 8, 9, 9, 10, 10, 11, 11, 12

 pw_20091: times 4 dw 20091
 pw_17734: times 4 dw 17734
@@ -646,6 +647,8 @@ cglobal put_vp8_epel8_v6, 7, 7, 8, dst, dststride, src, srcstride, height, picre

 %macro FILTER_BILINEAR 1
 %if cpuflag(ssse3)
+%define mov8 movq
+%define mov4 movd
 cglobal put_vp8_bilinear%1_v, 7, 7, 5, dst, dststride, src, srcstride, height, picreg, my
     shl      myd, 4
 %if PIC
@@ -653,10 +656,10 @@ cglobal put_vp8_bilinear%1_v, 7, 7, 5, dst, dststride, src, srcstride, height, p
 %endif
     pxor      m4, m4
     mova      m3, [bilinear_filter_vb+myq-16]
-    movh      m0, [srcq+srcstrideq*0]
+    mov%1     m0, [srcq+srcstrideq*0]
 .nextrow:
-    movh      m1, [srcq+srcstrideq*1]
-    movh      m2, [srcq+srcstrideq*2]
+    mov%1     m1, [srcq+srcstrideq*1]
+    mov%1     m2, [srcq+srcstrideq*2]
     punpcklbw m0, m1
     punpcklbw m1, m2
     pmaddubsw m0, m3
@@ -666,11 +669,11 @@ cglobal put_vp8_bilinear%1_v, 7, 7, 5, dst, dststride, src, srcstride, height, p
     psraw     m1, 2
     pavgw     m0, m4
     pavgw     m1, m4
-%if mmsize==8
+%if %1 == 4
     packuswb  m0, m0
     packuswb  m1, m1
-    movh   [dstq+dststrideq*0], m0
-    movh   [dstq+dststrideq*1], m1
+    movd   [dstq+dststrideq*0], m0
+    movd   [dstq+dststrideq*1], m1
 %else
     packuswb  m0, m1
     movh   [dstq+dststrideq*0], m0
@@ -723,9 +726,14 @@ cglobal put_vp8_bilinear%1_h, 6, 6 + npicregs, 5, dst, dststride, src, srcstride
     lea  picregq, [bilinear_filter_vb_m]
 %endif
     pxor      m4, m4
+%if %1 != 4
     mova      m2, [filter_h2_shuf]
+%else
+    mova      m2, [filter_h2_shuf2]
+%endif
     mova      m3, [bilinear_filter_vb+mxq-16]
 .nextrow:
+%if %1 != 4
     movu      m0, [srcq+srcstrideq*0]
     movu      m1, [srcq+srcstrideq*1]
     pshufb    m0, m2
@@ -737,15 +745,21 @@ cglobal put_vp8_bilinear%1_h, 6, 6 + npicregs, 5, dst, dststride, src, srcstride
     psraw     m1, 2
     pavgw     m0, m4
     pavgw     m1, m4
-%if mmsize==8
-    packuswb  m0, m0
-    packuswb  m1, m1
-    movh   [dstq+dststrideq*0], m0
-    movh   [dstq+dststrideq*1], m1
-%else
     packuswb  m0, m1
     movh   [dstq+dststrideq*0], m0
     movhps [dstq+dststrideq*1], m0
+%else
+    movq      m0, [srcq+srcstrideq*0]
+    movhps    m0, [srcq+srcstrideq*1]
+    pshufb    m0, m2
+    pmaddubsw m0, m3
+    lea     srcq, [srcq+srcstrideq*2]
+    psrlw     m0, 2
+    pavgw     m0, m4
+    packuswb  m0, m0
+    movd   [dstq+dststrideq*0], m0
+    psrldq    m0, 4
+    movd   [dstq+dststrideq*1], m0
 %endif
 %else ; cpuflag(ssse3)
 cglobal put_vp8_bilinear%1_h, 6, 6 + npicregs, 7, dst, dststride, src, srcstride, height, mx, picreg
@@ -790,9 +804,8 @@ cglobal put_vp8_bilinear%1_h, 6, 6 + npicregs, 7, dst, dststride, src, srcstride

 INIT_XMM sse2
 FILTER_BILINEAR 8
-INIT_MMX ssse3
-FILTER_BILINEAR 4
 INIT_XMM ssse3
+FILTER_BILINEAR 4
 FILTER_BILINEAR 8

 INIT_XMM sse2
diff --git a/tests/checkasm/vp8dsp.c b/tests/checkasm/vp8dsp.c
index 0df425a524..eeb487c6b1 100644
--- a/tests/checkasm/vp8dsp.c
+++ b/tests/checkasm/vp8dsp.c
@@ -262,7 +262,7 @@ static void check_mc(VP8DSPContext *d)
     BUF_RECT(uint8_t, dst0, 16, 16);
     BUF_RECT(uint8_t, dst1, 16, 16);
     int type, k, dx, dy;
-    declare_func_emms(AV_CPU_FLAG_MMX, void, uint8_t *, ptrdiff_t,
+    declare_func(void, uint8_t *, ptrdiff_t,
                       const uint8_t *, ptrdiff_t, int, int, int);

     for (type = 0; type < 2; type++) {