Commit a2224fda66 for ffmpeg

commit a2224fda66603539ff12f66be96226c6c7856942
Author: Niklas Haas <git@haasn.dev>
Date:   Sat Nov 7 14:47:22 2026 +0100

    swscale/x86/ops: store the f32 linear coefficients in the op chain

    The integer kernels keep using a separate allocation, since their
    pre-splatted coefficients (4x5 full lanes) are too large.

    Signed-off-by: Niklas Haas <git@haasn.dev>

diff --git a/libswscale/x86/ops.c b/libswscale/x86/ops.c
index 3bb1e2fd99..2816eb9d86 100644
--- a/libswscale/x86/ops.c
+++ b/libswscale/x86/ops.c
@@ -320,11 +320,10 @@ static int setup_linear(const SwsImplParams *params, SwsImplResult *out)
 {
     const SwsUOp *uop = params->uop;
     if (uop->type == SWS_PIXEL_F32) {
-        float *mat = av_refstruct_allocz(sizeof(uop->data.mat4x5));
-        if (!mat)
-            return AVERROR(ENOMEM);
-        memcpy(mat, uop->data.mat4x5, sizeof(uop->data.mat4x5));
-        ff_sws_op_priv_pack_refptr(out, mat);
+        /* Layout hard-coded in ops_float.asm */
+        static_assert(sizeof(uop->data.mat4x5) == 4 * 5 * sizeof(float),
+                      "mat4x5 layout mismatch");
+        SWS_OP_PRIV_PACK(out, uop->data.mat4x5);
         return 0;
     }

diff --git a/libswscale/x86/ops_float.asm b/libswscale/x86/ops_float.asm
index 75ba4a14dc..c385c73da4 100644
--- a/libswscale/x86/ops_float.asm
+++ b/libswscale/x86/ops_float.asm
@@ -583,30 +583,31 @@ IF NEED(3), linear_muladdps %1, mw%4, LOAD(3), m15, FMA(3)
 %endmacro

 %macro LINEAR_FMA 3
-%assign PRIV_SIZE  gprsize
+%assign PRIV_SIZE  4 * 5 * BYTES
 %assign ONE_MASK   %1
 %assign ZERO_MASK  %2
 %assign EXACT_MASK %3

-        mov tmp0q, [implq + SwsOpImpl.priv] ; address of matrix
         LOAD_CONT tmp1q
-IF1 X,  linear_row m8,  tmp0q +  0 * BYTES, 0
-IF1 Y,  linear_row m9,  tmp0q +  5 * BYTES, 1
-IF1 Z,  linear_row m10, tmp0q + 10 * BYTES, 2
-IF1 W,  linear_row m11, tmp0q + 15 * BYTES, 3
+%define MATRIX implq + SwsOpImpl.priv
+IF1 X,  linear_row m8,  MATRIX +  0 * BYTES, 0
+IF1 Y,  linear_row m9,  MATRIX +  5 * BYTES, 1
+IF1 Z,  linear_row m10, MATRIX + 10 * BYTES, 2
+IF1 W,  linear_row m11, MATRIX + 15 * BYTES, 3
 IF X,   mova mx, m8
 IF Y,   mova my, m9
 IF Z,   mova mz, m10
 IF W,   mova mw, m11
-IF1 X,  linear_row m8,  tmp0q +  0 * BYTES, 0, 2
-IF1 Y,  linear_row m9,  tmp0q +  5 * BYTES, 1, 2
-IF1 Z,  linear_row m10, tmp0q + 10 * BYTES, 2, 2
-IF1 W,  linear_row m11, tmp0q + 15 * BYTES, 3, 2
+IF1 X,  linear_row m8,  MATRIX +  0 * BYTES, 0, 2
+IF1 Y,  linear_row m9,  MATRIX +  5 * BYTES, 1, 2
+IF1 Z,  linear_row m10, MATRIX + 10 * BYTES, 2, 2
+IF1 W,  linear_row m11, MATRIX + 15 * BYTES, 3, 2
 IF X,   mova mx2, m8
 IF Y,   mova my2, m9
 IF Z,   mova mz2, m10
 IF W,   mova mw2, m11
         CONTINUE tmp1q
+%undef MATRIX
 %endmacro

 %macro LINEAR 2