Commit c46d4ac571 for qemu.org

commit c46d4ac571af93bb4474c036e0cdb959b573d098
Author: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Date:   Thu Oct 29 11:18:18 2026 +0100

    tests/tcg/mipsel: Add MIPS32R6 shift tests

    Test SLLV, SRLV and SRAV.

    Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
    Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
    Message-ID: <20261030182546.2508-5-philmd@oss.qualcomm.com>

diff --git a/tests/tcg/mipsel/meson.build b/tests/tcg/mipsel/meson.build
index d64cf50f5a..3c40a556ad 100644
--- a/tests/tcg/mipsel/meson.build
+++ b/tests/tcg/mipsel/meson.build
@@ -68,6 +68,7 @@ tests = []

 tests_mips32r6 = [
   'test_mips32r6_logic.c',
+  'test_mips32r6_shift.c',
 ]

 foreach src: tests_mips32r6
diff --git a/tests/tcg/mipsel/test_mips32r6_shift.c b/tests/tcg/mipsel/test_mips32r6_shift.c
new file mode 100644
index 0000000000..2f25e2a6bf
--- /dev/null
+++ b/tests/tcg/mipsel/test_mips32r6_shift.c
@@ -0,0 +1,74 @@
+/*
+ * MIPS32R6 tests: shift instructions
+ *
+ * Author:
+ *   Philippe Mathieu-Daudé
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <stdint.h>
+
+#include "../include/tap.h"
+#include "../mips/include/wrappers_mips32r6.h"
+#include "../mips/include/test_inputs_32.h"
+
+typedef void (*binary_op_32)(const uint32_t *, const uint32_t *, uint32_t *);
+typedef uint32_t (*ref_op_32)(uint32_t, uint32_t);
+
+/* Only the low 5 bits of the shift amount (rs) are used. */
+static uint32_t ref_sllv(uint32_t a, uint32_t b) { return a << (b & 31); }
+static uint32_t ref_srlv(uint32_t a, uint32_t b) { return a >> (b & 31); }
+static uint32_t ref_srav(uint32_t a, uint32_t b)
+{
+    return (uint32_t)((int32_t)a >> (b & 31));
+}
+
+static int check_one(const char *name, binary_op_32 op, ref_op_32 ref,
+                     uint32_t a, uint32_t b)
+{
+    uint32_t res = 0;
+
+    op(&a, &b, &res);
+    if (res != ref(a, b)) {
+        TAP_INFO("%s: %08x, %08x: got %08x expected %08x",
+                 name, a, b, res, ref(a, b));
+        return 1;
+    }
+    return 0;
+}
+
+static int run(const char *name, binary_op_32 op, ref_op_32 ref)
+{
+    int ret = 0;
+
+    /* Value/amount pairs from the input tables. */
+    for (size_t i = 0; i < PATTERN_INPUTS_32_SHORT_COUNT; i++) {
+        for (size_t j = 0; j < PATTERN_INPUTS_32_SHORT_COUNT; j++) {
+            ret |= check_one(name, op, ref, b32_pattern[i], b32_pattern[j]);
+        }
+    }
+    for (size_t i = 0; i < RANDOM_INPUTS_32_SHORT_COUNT; i++) {
+        for (size_t j = 0; j < RANDOM_INPUTS_32_SHORT_COUNT; j++) {
+            ret |= check_one(name, op, ref, b32_random[i], b32_random[j]);
+        }
+    }
+    /* Every shift amount (including ones with ignored high bits). */
+    for (size_t i = 0; i < PATTERN_INPUTS_32_SHORT_COUNT; i++) {
+        for (uint32_t sa = 0; sa < 64; sa++) {
+            ret |= check_one(name, op, ref, b32_pattern[i], sa);
+        }
+    }
+    tap_report(!ret, "MIPS32R6 shift %s", name);
+    return ret;
+}
+
+int main(void)
+{
+    TAP_START();
+    run("SLLV", do_mips32r6_SLLV, ref_sllv);
+    run("SRLV", do_mips32r6_SRLV, ref_srlv);
+    run("SRAV", do_mips32r6_SRAV, ref_srav);
+
+    return tap_done();
+}