Commit d6bbdb67a4b9 for kernel
commit d6bbdb67a4b9f2366debd8b5b05b1822490982ef
Merge: 6b4b543fa187 cf15f9f2361d
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Mon Oct 26 06:50:38 2026 -1000
Merge tag 'cxl-for-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
Pull CXL updates from Dave Jiang:
"The headline item is the first part of support for Dynamic Capacity
Devices (DCD). It covers flagging DCD support in the mailbox, reading
the dynamic capacity configuration from the device, gathering DSMAS
data for the DCD partitions, and configuring the dynamic capacity
interrupts. It also adds a documentation update and a cleanup that
enforces partition ordering. DCD is not enabled yet with these code
changes. Patches are applied to reduce the whole set in order to
relief the burden of very large patch set review.
Zero sized HDM decoders are now allowed, along with cxl_test support
for them. There is also a set of decoder hardening patches for switch
decoder enumeration. Latency calculations now account for link width
and use consistent units. The GPF timeout programming has been
reworked. The pull also has a number of misc patches.
A large number of bug fixes against pre-existing issues make up the
rest of the pull. Many of these were flagged by review of patches
posted to the mailing list by sashiko.
Also adding Richard Cheng as a reviewer (R) to the CXL sub-system"
* tag 'cxl-for-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (49 commits)
cxl/events: Test CME counter expiry with equality, not bitwise AND
Documentation/cxl: Document DPA partition layout and ordering rules
cxl/core: Enforce partition order/simplify partition calls
cxl/mem: Configure dynamic capacity interrupts
cxl/pci: Factor out interrupt policy check
cxl/events: Split event msgnum configuration from irq setup
cxl/cdat: Gather DSMAS data for DCD partitions
cxl/mem: Read dynamic capacity configuration from the device
cxl/mbox: Flag support for Dynamic Capacity Devices (DCD)
cxl/acpi: Convert QTG _DSM latencies to picoseconds
cxl: Account for link width in latency calculation
cxl/port: Convert PCIe link latency to nanoseconds
cxl/pci: Update only the Port GPF timeout fields
cxl/pci: Program the Port GPF timeouts before caching the DVSEC
cxl/pci: Use the Device GPF DVSEC for restricted endpoints
cxl/port: Attach endpoints to a dport under the lock that pins it
cxl/core: Hold the dport host lock across dport lookup and use
cxl/port: Clear cached dport pointers when a dport is removed
cxl/region: Warn on user region position mismatch
cxl/acpi: Check ACPI companion before use
...