Commit 010df8b0a2 for qemu.org

commit 010df8b0a293f3f95c2afd550e7e937c1a66a796
Merge: ac0cc20ad2 37863fff59
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date:   Tue May 5 10:10:49 2026 -0400

    Merge tag 'pull-target-arm-20260505' of https://gitlab.com/pm215/qemu into staging

    target-arm queue:
     * hw/arm/fsl-imx8mp: Do not create redundant unimplemented devices
     * hw/arm/fsl-imx8mp: Fix parent of ocram memory region
     * sysbus: Remove unused irq routing notifier method
     * linux-user/arm: Restrict regpairs_aligned
     * qemu-options: Improve description for -smb option
     * preliminary work for FEAT_RME_GDI
     * docs/devel/decodetree: Fix formatting in "field examples" table
     * hw/net/allwinner-sun8i-emac: Flush queued packets when rx is enabled
     * hw/intc/arm_gicv3: Fix NS write to ICC_AP1Rn_EL1 when prebits < 7
     * target/arm/kvm: Cache host CPU probe failure
     * hvf: support platform vGIC
     * hvf: support nested virtualization

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    * tag 'pull-target-arm-20260505' of https://gitlab.com/pm215/qemu: (29 commits)
      hvf: arm: enable vGIC by default for virt-11.1 and later
      hvf: enable nested virtualisation support
      hvf: arm: physical timer emulation
      hvf: arm: disable SME when nested virt is active
      target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1
      hvf: sync registers used at EL2
      hvf: arm: override HV_SYS_REG_MDCR_EL2
      target/arm: hvf: add asserts for code paths not leveraged when using the vGIC
      hvf: arm: allow exposing minimal PMU for kernel-irqchip=on
      hvf: gate ARM_FEATURE_PMU register emulation when using the Apple vGIC
      hvf: only call hvf_sync_vtimer() when running without the platform vGIC
      hw/arm, target/arm: nested virtualisation on HVF
      target/arm: hvf: instantiate GIC early
      accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC
      hw/intc: arm_gicv3_hvf: save/restore Apple GIC state
      hw/intc: Add hvf vGIC interrupt controller support
      target/arm/kvm: Cache host CPU probe failure
      hw/intc/arm_gicv3: Fix NS write to ICC_AP1Rn_EL1 when prebits < 7
      hw/net/allwinner-sun8i-emac: Flush queued packets when rx is enabled
      docs/devel/decodetree: Fix formatting in "field examples" table
      ...

    Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>