Commit 28e7aad522 for qemu.org
commit 28e7aad52202c7e6210e0e05d4f60360aaf8d027
Merge: 302c2f2df4 157f6c69ed
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Tue Sep 15 09:50:49 2026 -1000
Merge tag 'pull-target-arm-20260915' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* target/arm/whpx: fix whpx-arm post-reset CPU state
* target/arm/whpx: incorrect ENCODE_AA64_CP_REG parameter order
* target/arm/whpx: Don't try to sync ARM_CP_CONST registers
* hw/intc/bcm2835_ic: reject out-of-range FIQ source values
* sbsa-gwdt: reschedule timer on direct WCV load
* target/arm/hvf: implement MDCCSR_EL0 as RAZ
* hw/char/stm32l4x5_usart: Accept character input upon RDR read
* MAINTAINERS: Update email address for Vikram Garhwal
* hw/misc/bcm2835_powermgt: free wdog timer on finalize
* target/arm: initialize SCTLR reset value for arm11mpcore
* target/arm: Fix various v6M corner-case bugs
# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmqpevcZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3sWCEACa0CdtTNEq+p7eD45NMqoL
# HC811R1gUI0x2bMpKwYelF6d7v/ME6Id1SY98aLUqKhzWxqrcBkOgvAMd46XehLG
# M58ZzHqOLNJExqZmM3oZ5tGJ/R+7urV0nljnd+abi4R5EByjIZfSDLv5LCdNEsRo
# OC49OJLzIZwwLo0vzqW3PQKpn8xUmYJJrD6JSafUHXIUpqX4ymT0ipGPg6OEDzVY
# fI+QZFy5JMXYqiy1Armj7NYg6OO6zJ49LgwBcBkPImvBD7IFBAPHwcQ0tANXTNBI
# 3OjI6hF1GXVjaXiviRNQfUs2SyEEe1SRJDrJdfpxDtkzcaVZocesNWJ/6esvETEj
# XZuky9+vxqDC5CWYVgh6ZxHk2ONjnUP320g+ojK9weCBnifwooiqM7V9gfCoIFEG
# 3ZRUodJVf2a4WZhZYcErQrOYkPNfvhUPkKaKZ6mwHGwx5AP2p3i6/emLBO4VMNbv
# 3SIr8/qvsZGy1fJZpcd4UGT7cxIwqV1wZAuhpPo328HTzGxPQ7K4XdPPbAIJKTYR
# CwQ5ONcMAMhvajD+21z73dv4JsrPQ51R9NQC44m5vbunrt2lB96/bE4InbJ3egOI
# RwTrj8Lhd8nMJ4lplY5hYVghwmNOud5Vxz0+JAeTXpcNOmhp9WfFgmE3GBpX6snW
# lO2Ikiv8qkhhYFaTGbaTLA==
# =OqTA
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 15 Sep 2026 07:05:59 AM HST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260915' of https://gitlab.com/pm215/qemu:
target/arm: extend PMSAv7 support to v6-M CPUs
target/arm: fix MPU SIZE min for v6-M/v7-M/v7-R
target/arm: MPU_RASR: mask TEX bits for Armv6-M
target/arm: MPU - limit regs RBAR/RASR A1-A3 to Main Extension
target/arm: enforce Armv6-M NVIC limits
target/arm: initialize SCTLR reset value for arm11mpcore
hw/misc/bcm2835_powermgt: free wdog timer on finalize
MAINTAINERS: Update email address for Vikram Garhwal
hw/char/stm32l4x5_usart: Accept character input upon RDR read
target/arm/hvf: implement MDCCSR_EL0 as RAZ
sbsa-gwdt: reschedule timer on direct WCV load
sbsa-gwdt: don't arm timer for compare values above INT64_MAX
sbsa-gwdt: rename sbsa_gwdt_update_timer() to sbsa_gwdt_wor_update_timer()
arm: gwdt: simplify WCV update condition
arm: gwdt: consolidate clear WS0 and WS1 on explicit refresh
sbsa-gwdt: reduce code indent
hw/intc/bcm2835_ic: reject out-of-range FIQ source values
target/arm/whpx: fix whpx-arm post-reset CPU state
target/arm/whpx: incorrect ENCODE_AA64_CP_REG parameter order
target/arm/whpx: Don't try to sync ARM_CP_CONST registers
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>