Commit 2b18f70938 for qemu.org
commit 2b18f709382dacaee534cce264a12d7c631290b8
Merge: a02bebe15c 1aee8067fc
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: Thu Apr 30 10:30:58 2026 -0400
Merge tag 'pull-ppc-for-11.1-20260429' of https://gitlab.com/harshpb/qemu into staging
PPC PR for 11.1
* MPIPL support for PowerNV
* ppc/pnv: Add a nest MMU model
* hw/ssi/pnv_spi: Fix fifo8 memory leak on unrealize
* hw/intc/xics: Add a check for an invalid server id
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# gpg: Signature made Wed 29 Apr 2026 14:09:07 EDT
# gpg: using RSA key 6B810CD6D2BE10F3883D21424544E994F9D68FBB
# gpg: Good signature from "Harsh Prateek Bora <harsh.prateek.bora@gmail.com>" [full]
# gpg: aka "Harsh Prateek Bora <harshpb@linux.ibm.com>" [full]
# Primary key fingerprint: 6B81 0CD6 D2BE 10F3 883D 2142 4544 E994 F9D6 8FBB
* tag 'pull-ppc-for-11.1-20260429' of https://gitlab.com/harshpb/qemu:
hw/intc/xics: Add a check for an invalid server id
ppc/pnv: Add a nest MMU model
hw/ssi/pnv_spi: Fix fifo8 memory leak on unrealize
MAINTAINERS: Add entry for MPIPL (PowerNV)
tests/functional: Add test for MPIPL in PowerNV
pnv/mpipl: Enable MPIPL support
pnv/mpipl: Write the preserved CPU and MDRT state
pnv/mpipl: Set thread entry size to be allocated by firmware
pnv/mpipl: Preserve CPU registers after crash
pnv/mpipl: Preserve memory regions as per MDST/MDDT tables
ppc/pnv: Handle stash command in PowerNV SBE
ppc/mpipl: Implement S0 SBE interrupt
ppc/pnv: Move SBE host doorbell function to top of file
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>