Commit 2f0870fd6a for qemu.org
commit 2f0870fd6aaafe8b5c94bad5e0658f985c8d3ddb
Merge: 0b91040d23 a2834b853d
Author: Peter Maydell <peter.maydell@linaro.org>
Date: Wed Feb 11 15:12:42 2026 +0000
Merge tag 'pull-target-arm-20260210' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* Add whpx accelerator support for the virt board
* Implement FEAT_E2H0
* Implement WFE, SEV and SEVONPEND for Cortex-M
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# gpg: Signature made Tue Feb 10 13:51:21 2026 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260210' of https://gitlab.com/pm215/qemu: (26 commits)
target/arm: implement FEAT_E2H0
target/arm: Implement WFE, SEV and SEVONPEND for Cortex-M
target/arm: Remove entry for "any" from cpu32 arm_tcg_cpus[] list
hw/arm/virt: Rename arm_virt_compat into arm_virt_compat_defaults
whpx: arm64: add partition-wide reset on the reboot path
whpx: enable arm64 builds
target/arm: whpx: instantiate GIC early
whpx: arm64: implement -cpu host
hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX and HVF
whpx: arm64: clamp down IPA size
target/arm: cpu: mark WHPX as supporting PSCI 1.3
whpx: change memory management logic
whpx: add arm64 support
hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
whpx: ifdef out winhvemulation on non-x86_64
whpx: reshuffle common code
whpx: Move around files before introducing AArch64 support
docs: arm: update virt machine model description
qtest: hw/arm: virt: add new test case for GICv3 + GICv2m
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>