Commit 654b54fb37 for qemu.org
commit 654b54fb372180924f8206d6dfd29cecdef1d8ac
Merge: 30e8a06b64 94e3ad7800
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: Thu Jul 2 10:44:27 2026 +0200
Merge tag 'pull-target-arm-20260629' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* hw/timer/imx_epit: Replace DPRINTF with trace events
target/arm: Enable SCTLR_EL1.EnFPM for user-only
target/arm: Implement FEAT_SME_F8F32
target/arm: Implement FEAT_SSVE_AES
target/arm: Implement FEAT_SME_F8F16
target/arm: GICv5: Fix some minor bugs
target/arm: Add GPC3 granule bypass windows
target/arm: Fix some minor timer related bugs
hw/arm/sabrelite: Add FlexCAN emulation
docs/system: add FEAT_ECV_POFF to the emulation list
docs/system/arm/virt: Document accelerated SMMUv3 and Tegra241 CMDQV
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# gpg: Signature made Mon 29 Jun 2026 13:57:24 CEST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260629' of https://gitlab.com/pm215/qemu: (54 commits)
docs/system/arm/virt: Document accelerated SMMUv3 and Tegra241 CMDQV
target/arm: Enable FEAT_SME_F8F16 for -cpu max
target/arm: Implement FVDOT (FP8 to FP16)
target/arm: Rename FVDOT pattern
target/arm: Implement FMOPA (widening, 2-way, FP8 to FP16)
target/arm: Implement FDOT (multiple and indexed, FP8 to FP16)
target/arm: Implement FDOT (multiple, multiple and single, FP8 to FP16)
target/arm: Implement FMLAL (multiple and indexed, FP8 to FP16)
target/arm: Implement FMLAL (multiple, multiple and single, FP8 to FP16)
target/arm: Rename SME FMLAL/FMLSL patterns
target/arm: Enable FADD/FSUB (half-precision) with FEAT_SME_F8F16
docs/system: add FEAT_ECV_POFF to the emulation list
target/arm: trigger timer recalc on HCR:(E2H|TGE) changes
target/arm: gate check on scr_el3 behind ARM_FEATURE_EL3 check
target/arm: trigger timer recalc on SCR:ECVEN change
target/arm: trigger timer recalculation when toggling CNTHCTL:ECV
target/arm: split evaluation of CNTHCTL timer IRQ masks
docs/arm/sabrelite: Mention FlexCAN support
tests: Add qtests for FlexCAN
hw/arm: Plug FlexCAN into FSL_IMX6 and Sabrelite
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>