Commit 774e6f5c15 for qemu.org

commit 774e6f5c1533aba9e04f95cb8cfba64d8329fcb0
Author: Vivien LEGER <vivien.leger@gmail.com>
Date:   Sat Apr 11 17:45:35 2026 +0200

    hw/ppc/e500: fix bus-frequency property hardcoded to zero in CPU FDT node

    The bus-frequency property in the CPU FDT node was hardcoded to 0.
    This is incorrect - it should reflect the actual platform bus clock
    frequency, as firmware and RTOSes use it to derive peripheral clock
    rates.

    Notably, the RTEMS QorIQ BSP uses bus-frequency to program the MPIC
    global timer interval. With bus-frequency=0, the timer interval
    overflows to ~85 seconds, preventing any clock interrupts from firing.

    Fix by adding a bus_freq field to PPCE500MachineClass and using it in
    the FDT generator. Set bus_freq = PLATFORM_CLK_FREQ_HZ (400MHz) for
    existing machines, matching the existing clock_freq value.

    Signed-off-by: Vivien LEGER <vivien.leger@gmail.com>
    Reviewed-by: Bernhard Beschow <shentey@gmail.com>
    Message-ID: <20260411154535.1451361-1-vivien.leger@gmail.com>
    Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index d6ca2e8563..5be2f2095f 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -518,7 +518,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
                               env->icache_line_size);
         qemu_fdt_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000);
         qemu_fdt_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000);
-        qemu_fdt_setprop_cell(fdt, cpu_name, "bus-frequency", 0);
+        qemu_fdt_setprop_cell(fdt, cpu_name, "bus-frequency", pmc->bus_freq);
         if (cpu->cpu_index) {
             qemu_fdt_setprop_string(fdt, cpu_name, "status", "disabled");
             qemu_fdt_setprop_string(fdt, cpu_name, "enable-method",
diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h
index 11f8ae5317..6d56c7b4cb 100644
--- a/hw/ppc/e500.h
+++ b/hw/ppc/e500.h
@@ -40,6 +40,7 @@ struct PPCE500MachineClass {
     hwaddr pci_mmio_bus_base;
     hwaddr spin_base;
     uint32_t clock_freq;
+    uint32_t bus_freq;
     uint32_t tb_freq;
 };

diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index ca5647284d..85cec810d9 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -94,6 +94,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, const void *data)
     pmc->pci_mmio_bus_base = 0xE0000000ULL;
     pmc->spin_base = 0xFEF000000ULL;
     pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;
+    pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;
     pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;

     mc->desc = "generic paravirt e500 platform";
diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c
index 6a5d3edc49..a5717a9cde 100644
--- a/hw/ppc/mpc8544ds.c
+++ b/hw/ppc/mpc8544ds.c
@@ -56,6 +56,7 @@ static void mpc8544ds_machine_class_init(ObjectClass *oc, const void *data)
     pmc->pci_pio_base = 0xE1000000ULL;
     pmc->spin_base = 0xEF000000ULL;
     pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;
+    pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;
     pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;

     mc->desc = "mpc8544ds";