Commit 827751b699b7 for kernel

commit 827751b699b79a6e569983359c02dce67f81b94c
Merge: 1235ff329981 b94cec5761d2
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Fri Sep 11 13:15:13 2026 -0700

    Merge tag 'riscv-for-linus-7.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

    Pull RISC-V fixes from Paul Walmsley:
     "From a RISC-V point of view, there's one notable fix here, reverting
      an earlier bogus fix to the pointer masking code. Fortunately the
      practical impact appears to be small.

       - Revert a bad fix, likely LLM-generated, in the pointer masking code
         that confused the RISC-V hardware pointer masking implementation
         with the Linux kernel tagged address feature

       - Fix unexpected faults caused by kprobe instruction slot writes when
         !CONFIG_STRICT_MODULE_RWX

       - Fix unexpected faults on minimal configurations during runtime code
         patching on !CONFIG_STRICT_MODULE_RWX systems

       - Fix a misplaced variable clear causing incorrect reuse of previous
         values in the RISC-V hardware feature probing code

       - Fix two bugs in the PMU SBI perf code on rv32: use BIT_ULL rather
         than BIT on 64-bit masks; and use a bitmap rather than an unsigned
         long on a quantity that can exceed 32 bits

      And a few miscellaneous cleanups:

       - Avoid a potential dereference-before-NULL-pointer-check bug in the
         PMU SBI perf driver

       - Use CONFIG_GENERIC_BUG_RELATIVE_POINTERS to simplify the rv32 bug
         table code (like x86 and PPC)

       - Report the RISC-V standard ISA extensions Z[v]fhmin when support is
         claimed for the superset RISC-V standard ISA extensions Z[v]fh; and
         simplify our FPU test code to only check for the presence of the D
         extension

       - Use an existing kernel string helper in place of some open-coded
         code in kernel/usercfi.c

       - Fix some yamllint issues in the RISC-V DT bindings for CPUs

       - Convert one use of __ASSEMBLY__ to __ASSEMBLER__ that snuck into
         the RISC-V CFI selftest code

       - Update the translation for the simplified Chinese translation of
         the RISC-V kernel patch acceptance policy"

    * tag 'riscv-for-linus-7.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
      riscv: skip software algning code for HAVE_EFFICIENT_UNALIGNED_ACCESS
      kselftest/riscv: Replace __ASSEMBLY__ with __ASSEMBLER__
      docs/zh_CN: Update arch/riscv/patch-acceptance.rst translation
      dt-bindings: riscv: cpus: Fix yamllint style issues
      riscv: hwprobe: simplify has_fpu() to check D extension only
      perf: RISC-V: check cpu_hw_evt before dereference in overflow IRQ
      riscv: report Zfhmin/Zvfhmin when Zfh/Zvfh are present
      perf: RISC-V: store available counter mask as bitmap
      perf: RISC-V: use BIT_ULL for u64 overflow masks
      riscv: bug: Make RV32 use GENERIC_BUG_RELATIVE_POINTERS
      riscv: hwprobe: initialize pair->value in hwprobe_one_pair()
      riscv: use string helper in setup_global_riscv_enable()
      Revert "riscv: Reset pmm when PR_TAGGED_ADDR_ENABLE is not set"
      riscv: patch: skip fixmap mapping when kernel text is already writable
      riscv: mm: make EXECMEM_KPROBES writable without CONFIG_STRICT_MODULE_RWX