Commit 87751e715e23 for kernel

commit 87751e715e23ede7386fb57a1a8593aa9830b21f
Merge: f824272b6e3f 281326be6725
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sun Nov 16 07:05:24 2025 -0800

    Merge tag 'edac_urgent_for_v6.18_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras

    Pull EDAC fixes from Borislav Petkov:

     - In Versalnet, handle the reporting of non-standard hw errors whose
       information can come in more than one remote processor message.

     - Explicitly reenable ECC checking after a warm reset in Altera OCRAM
       as those registers are reset to default otherwise

     - Fix single-bit error injection in Altera EDAC to not inject errors
       directly in ECC RAM and thus lead to false double-bit errors due to
       same ECC RAM being in concurrent use

    * tag 'edac_urgent_for_v6.18_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
      EDAC/altera: Use INTTEST register for Ethernet and USB SBE injection
      EDAC/altera: Handle OCRAM ECC enable after warm reset
      EDAC/versalnet: Handle split messages for non-standard errors