Commit 995aaab967 for qemu.org

commit 995aaab9674d4e586a2cabbdd60e25ad14406ee8
Author: Brian Cain <brian.cain@oss.qualcomm.com>
Date:   Thu Sep 3 11:56:15 2026 -0700

    hw/hexagon: register the V68N_1024 machine

    This DSP definition file was present but not referenced.  Also: add a
    'sim' alias for this machine to indicate a recent machine with
    memory-map resembling that used by 'hexagon-sim'.

    Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
    Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>

diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c
index 5b2b6e312b..ff110234b0 100644
--- a/hw/hexagon/hexagon_dsp.c
+++ b/hw/hexagon/hexagon_dsp.c
@@ -29,6 +29,7 @@
 #include "semihosting/semihost.h"

 #include "machine_cfg_v66g_1024.h.inc"
+#include "machine_cfg_v68n_1024.h.inc"

 #define TYPE_HEXAGON_DSP_MACHINE "hexagon-dsp-machine"
 OBJECT_DECLARE_SIMPLE_TYPE(HexagonDspMachineState, HEXAGON_DSP_MACHINE)
@@ -181,6 +182,23 @@ static void v66g_1024_init(ObjectClass *oc, const void *data)
     mc->default_cpus = 4;
 }

+static void v68n_1024_config_init(MachineState *machine)
+{
+    hexagon_common_init(machine, v68_rev, &v68n_1024);
+}
+
+static void v68n_1024_init(ObjectClass *oc, const void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+
+    mc->desc = "Hexagon V68N_1024";
+    mc->alias = "sim";
+    mc->init = v68n_1024_config_init;
+    init_mc(mc);
+    mc->default_cpu_type = TYPE_HEXAGON_CPU_V68;
+    mc->default_cpus = 6;
+}
+
 static const TypeInfo hexagon_machine_types[] = {
     {
         .name = TYPE_HEXAGON_COMMON_MACHINE,
@@ -199,6 +217,11 @@ static const TypeInfo hexagon_machine_types[] = {
         .parent = TYPE_HEXAGON_DSP_MACHINE,
         .class_init = v66g_1024_init,
     },
+    {
+        .name = MACHINE_TYPE_NAME("V68N_1024"),
+        .parent = TYPE_HEXAGON_DSP_MACHINE,
+        .class_init = v68n_1024_init,
+    },
 };

 DEFINE_TYPES(hexagon_machine_types)