Commit d21a442a5a for qemu.org
commit d21a442a5ab9bc1597afea13f01113d5bb3e772c
Merge: b6bba79e97 5252c07746
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Mon Feb 2 15:04:44 2026 +1100
Merge tag 'pull-target-arm-20260129' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* Support SMMUv3 acceleration
* A few other minor cleanups and fixes
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# gpg: Signature made Fri 30 Jan 2026 03:08:11 AM AEDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260129' of https://gitlab.com/pm215/qemu: (43 commits)
arm: add DCZID_EL0 to idregs array
arm: add {get,set}_dczid_bs helpers
docs/system: update FEAT_BBML[12] references
MAINTAINERS: add emulation.rst to ARM TCG CPUs
target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0
target/arm/hvf: Move hvf_sysreg_[read, write]_cp() functions around
hw/arm/smmuv3-accel: Make SubstreamID support configurable
hw/vfio/pci: Synthesize PASID capability for vfio-pci devices
hw/pci: Factor out common PASID capability initialization
hw/pci: Add helper to insert PCIe extended capability at a fixed offset
backends/iommufd: Add get_pasid_info() callback
backends/iommufd: Retrieve PASID width from iommufd_backend_get_device_info()
hw/arm/smmuv3-accel: Add property to specify OAS bits
hw/arm/smmuv3-accel: Add support for ATS
hw/arm/smmuv3-accel: Add a property to specify RIL support
hw/arm/smmuv3: Add accel property for SMMUv3 device
hw/arm/smmuv3: Block migration when accel is enabled
tests/qtest/bios-tables-test: Update IORT blobs after revision upgrade
hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding
tests/qtest/bios-tables-test: Prepare for IORT revison upgrade
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>