Commit f081225c62 for qemu.org
commit f081225c62cbd6facdcd7c74bfd795fe99eda6c2
Author: Jay Chang <jay.chang@sifive.com>
Date: Mon May 18 15:22:38 2026 +0800
hw/riscv: Don't insert DDT cache in Bare mode
In Bare mode the IOMMU does not perform DDT look-ups, therefore
caching DDT entries is unnecessary.
Signed-off-by: Jay Chang <jay.chang@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Message-ID: <20260518072239.16293-2-jay.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index 1b8a8e9ef2..5b28b1ad63 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -1358,16 +1358,23 @@ static RISCVIOMMUContext *riscv_iommu_ctx(RISCVIOMMUState *s,
int fault = riscv_iommu_ctx_fetch(s, ctx);
if (!fault) {
- if (g_hash_table_size(ctx_cache) >= LIMIT_CACHE_CTX) {
+ if (mode != RISCV_IOMMU_DDTP_MODE_BARE) {
+ if (g_hash_table_size(ctx_cache) >= LIMIT_CACHE_CTX) {
+ g_hash_table_unref(ctx_cache);
+ ctx_cache = g_hash_table_new_full(riscv_iommu_ctx_hash,
+ riscv_iommu_ctx_equal,
+ g_free, NULL);
+ g_hash_table_ref(ctx_cache);
+ g_hash_table_unref(qatomic_xchg(&s->ctx_cache, ctx_cache));
+ }
+
+ g_hash_table_add(ctx_cache, ctx);
+ *ref = ctx_cache;
+ } else {
g_hash_table_unref(ctx_cache);
- ctx_cache = g_hash_table_new_full(riscv_iommu_ctx_hash,
- riscv_iommu_ctx_equal,
- g_free, NULL);
- g_hash_table_ref(ctx_cache);
- g_hash_table_unref(qatomic_xchg(&s->ctx_cache, ctx_cache));
+ /* Remember ctx so it can be freed */
+ *ref = ctx;
}
- g_hash_table_add(ctx_cache, ctx);
- *ref = ctx_cache;
return ctx;
}