Commit 7858012634 for qemu.org
commit 7858012634be7b987d9cb4c4520e55ccffedb2db
Author: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Date: Wed Sep 30 02:01:03 2026 +0000
target/tricore: prefix helpers conflicting with other arch
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260930020108.217892-17-pierrick.bouvier@oss.qualcomm.com
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c
index 1b72dcc5f5..fa268a8a6b 100644
--- a/target/tricore/fpu_helper.c
+++ b/target/tricore/fpu_helper.c
@@ -118,7 +118,7 @@ static void f_update_psw_flags(CPUTriCoreState *env, uint8_t flags)
}
#define FADD_SUB(op) \
-uint32_t helper_f##op(CPUTriCoreState *env, uint32_t r1, uint32_t r2) \
+uint32_t helper_tricore_f##op(CPUTriCoreState *env, uint32_t r1, uint32_t r2) \
{ \
float32 arg1 = make_float32(r1); \
float32 arg2 = make_float32(r2); \
@@ -144,7 +144,7 @@ uint32_t helper_f##op(CPUTriCoreState *env, uint32_t r1, uint32_t r2) \
FADD_SUB(add)
FADD_SUB(sub)
-uint32_t helper_fmul(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
+uint32_t helper_tricore_fmul(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
{
uint32_t flags;
float32 arg1 = make_float32(r1);
@@ -251,7 +251,7 @@ uint32_t helper_qseed(CPUTriCoreState *env, uint32_t r1)
return (uint32_t) result;
}
-uint32_t helper_fdiv(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
+uint32_t helper_tricore_fdiv(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
{
uint32_t flags;
float32 arg1 = make_float32(r1);
@@ -331,7 +331,7 @@ uint32_t helper_fmsub(CPUTriCoreState *env, uint32_t r1,
return (uint32_t)f_result;
}
-uint32_t helper_fcmp(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
+uint32_t helper_tricore_fcmp(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
{
uint32_t result, flags;
float32 arg1 = make_float32(r1);
@@ -354,7 +354,7 @@ uint32_t helper_fcmp(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
return result;
}
-uint32_t helper_ftoi(CPUTriCoreState *env, uint32_t arg)
+uint32_t helper_tricore_ftoi(CPUTriCoreState *env, uint32_t arg)
{
float32 f_arg = make_float32(arg);
int32_t result, flags;
@@ -447,7 +447,7 @@ uint32_t helper_ftohp(CPUTriCoreState *env, uint32_t arg)
return result;
}
-uint32_t helper_itof(CPUTriCoreState *env, uint32_t arg)
+uint32_t helper_tricore_itof(CPUTriCoreState *env, uint32_t arg)
{
float32 f_result;
uint32_t flags;
diff --git a/target/tricore/helper.h b/target/tricore/helper.h
index 1d97d078b0..6073fd7037 100644
--- a/target/tricore/helper.h
+++ b/target/tricore/helper.h
@@ -102,18 +102,18 @@ DEF_HELPER_FLAGS_1(parity, TCG_CALL_NO_RWG_SE, i32, i32)
/* float */
DEF_HELPER_FLAGS_4(pack, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32, i32)
DEF_HELPER_1(unpack, i64, i32)
-DEF_HELPER_3(fadd, i32, env, i32, i32)
-DEF_HELPER_3(fsub, i32, env, i32, i32)
-DEF_HELPER_3(fmul, i32, env, i32, i32)
-DEF_HELPER_3(fdiv, i32, env, i32, i32)
+DEF_HELPER_3(tricore_fadd, i32, env, i32, i32)
+DEF_HELPER_3(tricore_fsub, i32, env, i32, i32)
+DEF_HELPER_3(tricore_fmul, i32, env, i32, i32)
+DEF_HELPER_3(tricore_fdiv, i32, env, i32, i32)
DEF_HELPER_4(fmadd, i32, env, i32, i32, i32)
DEF_HELPER_4(fmsub, i32, env, i32, i32, i32)
-DEF_HELPER_3(fcmp, i32, env, i32, i32)
+DEF_HELPER_3(tricore_fcmp, i32, env, i32, i32)
DEF_HELPER_2(qseed, i32, env, i32)
-DEF_HELPER_2(ftoi, i32, env, i32)
+DEF_HELPER_2(tricore_ftoi, i32, env, i32)
DEF_HELPER_2(ftohp, i32, env, i32)
DEF_HELPER_2(hptof, i32, env, i32)
-DEF_HELPER_2(itof, i32, env, i32)
+DEF_HELPER_2(tricore_itof, i32, env, i32)
DEF_HELPER_2(utof, i32, env, i32)
DEF_HELPER_2(ftoiz, i32, env, i32)
DEF_HELPER_2(ftou, i32, env, i32)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 8cd6b58f66..81db388e5e 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -6290,10 +6290,10 @@ static void decode_rr_divide(DisasContext *ctx)
}
break;
case OPC2_32_RR_MUL_F:
- gen_helper_fmul(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);
+ gen_helper_tricore_fmul(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);
break;
case OPC2_32_RR_DIV_F:
- gen_helper_fdiv(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);
+ gen_helper_tricore_fdiv(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);
break;
case OPC2_32_RR_FTOHP:
if (has_feature(ctx, TRICORE_FEATURE_162)) {
@@ -6310,13 +6310,13 @@ static void decode_rr_divide(DisasContext *ctx)
}
break;
case OPC2_32_RR_CMP_F:
- gen_helper_fcmp(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);
+ gen_helper_tricore_fcmp(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]);
break;
case OPC2_32_RR_FTOI:
- gen_helper_ftoi(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1]);
+ gen_helper_tricore_ftoi(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1]);
break;
case OPC2_32_RR_ITOF:
- gen_helper_itof(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1]);
+ gen_helper_tricore_itof(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1]);
break;
case OPC2_32_RR_FTOU:
gen_helper_ftou(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1]);
@@ -6725,10 +6725,10 @@ static void decode_rrr_divide(DisasContext *ctx)
}
break;
case OPC2_32_RRR_ADD_F:
- gen_helper_fadd(cpu_gpr_d[r4], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r3]);
+ gen_helper_tricore_fadd(cpu_gpr_d[r4], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r3]);
break;
case OPC2_32_RRR_SUB_F:
- gen_helper_fsub(cpu_gpr_d[r4], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r3]);
+ gen_helper_tricore_fsub(cpu_gpr_d[r4], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r3]);
break;
case OPC2_32_RRR_MADD_F:
gen_helper_fmadd(cpu_gpr_d[r4], tcg_env, cpu_gpr_d[r1],