Commit 23c4540053 for ffmpeg
commit 23c454005319dee4a5bcae5c370f75fdeb325230
Author: Zuxy Meng <zuxy.meng@gmail.com>
Date: Mon Nov 2 21:10:49 2026 -0800
avcodec/x86/vp9: convert tm_4x4_10/12 predictors MMXEXT to SSE2
Convert the 16-bit TM_VP8 4x4 predictors (10- and 12-bit,
sharing one .body) from MMXEXT to XMM.
This completes deprecation of all MMX code from vp9's intrapred, so
we replace declare_func_emms with declare_func in test code too.
Benchmarks (checkasm, Zen 4, pinned, median of 3
interleaved pairs, cycles):
vp9_tm_4x4_10bpp: 2.9 -> 1.8
vp9_tm_4x4_12bpp: 2.9 -> 1.9
checkasm --test=vp9dsp passes (1272/1272 over 3 seeds).
Signed-off-by: Zuxy Meng <zuxy.meng@gmail.com>
diff --git a/libavcodec/x86/vp9dsp_init_16bpp_template.c b/libavcodec/x86/vp9dsp_init_16bpp_template.c
index 969db94d3c..2817d0ec81 100644
--- a/libavcodec/x86/vp9dsp_init_16bpp_template.c
+++ b/libavcodec/x86/vp9dsp_init_16bpp_template.c
@@ -119,7 +119,7 @@ lpf_mix2_wrappers_set(BPC, sse2)
lpf_mix2_wrappers_set(BPC, ssse3)
lpf_mix2_wrappers_set(BPC, avx)
-decl_ipred_fns(tm, BPC, mmxext, sse2);
+decl_ipred_fns(tm, BPC, sse2, sse2);
decl_itxfm_func(iwht, iwht, 4, BPC, mmxext);
#if BPC == 10
@@ -180,7 +180,6 @@ av_cold void INIT_FUNC(VP9DSPContext *dsp, int bitexact)
init_itx_func(idx, ADST_ADST, iadst, iadst, size, bpp, opt); \
if (EXTERNAL_MMXEXT(cpu_flags)) {
- init_ipred_func(tm, TM_VP8, 4, BPC, mmxext);
if (!bitexact) {
init_itx_func_one(4 /* lossless */, iwht, iwht, 4, BPC, mmxext);
}
@@ -190,7 +189,7 @@ av_cold void INIT_FUNC(VP9DSPContext *dsp, int bitexact)
init_subpel3(0, put, BPC, sse2);
init_subpel3(1, avg, BPC, sse2);
init_lpf_funcs(BPC, sse2);
- init_8_16_32_ipred_funcs(tm, TM_VP8, BPC, sse2);
+ init_ipred_funcs(tm, TM_VP8, BPC, sse2);
#if BPC == 10
if (!bitexact) {
init_itx_func(TX_4X4, ADST_DCT, idct, iadst, 4, 10, sse2);
diff --git a/libavcodec/x86/vp9intrapred_16bpp.asm b/libavcodec/x86/vp9intrapred_16bpp.asm
index 196e53fe10..d588151674 100644
--- a/libavcodec/x86/vp9intrapred_16bpp.asm
+++ b/libavcodec/x86/vp9intrapred_16bpp.asm
@@ -475,21 +475,21 @@ cglobal vp9_ipred_dc_%1_32x32_16, 4, 4, 2, dst, stride, l, a
DC_1D_FNS top, aq
DC_1D_FNS left, lq
-INIT_MMX mmxext
+INIT_XMM sse2
cglobal vp9_ipred_tm_4x4_10, 4, 4, 6, dst, stride, l, a
mova m5, [pw_1023]
.body:
- mova m4, [aq]
- mova m3, [lq]
+ movq m4, [aq]
+ movq m3, [lq]
movd m0, [aq-4]
- pshufw m0, m0, q1111
+ pshuflw m0, m0, q1111
psubw m4, m0
DEFINE_ARGS dst, stride, stride3
lea stride3q, [strideq*3]
- pshufw m0, m3, q3333
- pshufw m1, m3, q2222
- pshufw m2, m3, q1111
- pshufw m3, m3, q0000
+ pshuflw m0, m3, q3333
+ pshuflw m1, m3, q2222
+ pshuflw m2, m3, q1111
+ pshuflw m3, m3, q0000
paddw m0, m4
paddw m1, m4
paddw m2, m4
@@ -503,10 +503,10 @@ cglobal vp9_ipred_tm_4x4_10, 4, 4, 6, dst, stride, l, a
pminsw m1, m5
pminsw m2, m5
pminsw m3, m5
- mova [dstq+strideq*0], m0
- mova [dstq+strideq*1], m1
- mova [dstq+strideq*2], m2
- mova [dstq+stride3q ], m3
+ movq [dstq+strideq*0], m0
+ movq [dstq+strideq*1], m1
+ movq [dstq+strideq*2], m2
+ movq [dstq+stride3q ], m3
RET
cglobal vp9_ipred_tm_4x4_12, 4, 4, 6, dst, stride, l, a
diff --git a/tests/checkasm/vp9dsp.c b/tests/checkasm/vp9dsp.c
index 993e0715aa..986c5802a3 100644
--- a/tests/checkasm/vp9dsp.c
+++ b/tests/checkasm/vp9dsp.c
@@ -56,8 +56,8 @@ static void check_ipred(void)
LOCAL_ALIGNED_32(uint8_t, dst1, [32 * 32 * 2]);
VP9DSPContext dsp;
int tx, mode, bit_depth;
- declare_func_emms(AV_CPU_FLAG_MMX | AV_CPU_FLAG_MMXEXT, void, uint8_t *dst, ptrdiff_t stride,
- const uint8_t *left, const uint8_t *top);
+ declare_func(void, uint8_t *dst, ptrdiff_t stride,
+ const uint8_t *left, const uint8_t *top);
static const char *const mode_names[N_INTRA_PRED_MODES] = {
[VERT_PRED] = "vert",
[HOR_PRED] = "hor",