Commit 26b65e2004 for qemu.org

commit 26b65e2004cd08f8579d73c89fd3c203c3c5dff2
Author: Brian Cain <brian.cain@oss.qualcomm.com>
Date:   Tue Sep 15 09:30:39 2026 -0700

    tests/tcg/hexagon: add dczeroa cache line zero test

    Test the dczeroa instruction which zeroes a cache line.  Verifies aligned,
    unaligned, and buffer-start addresses.

    Reviewed-by: Sid Manning <sid.manning@oss.qualcomm.com>
    Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>

diff --git a/tests/tcg/hexagon/meson.build b/tests/tcg/hexagon/meson.build
index 6074e56f6d..ff3c095d9c 100644
--- a/tests/tcg/hexagon/meson.build
+++ b/tests/tcg/hexagon/meson.build
@@ -74,6 +74,7 @@ tests += {
   'test_clobber.S': {'cflags': asmflags},
   'test_cmp.S': {'cflags': asmflags},
   'test_cond_branch.c': {'cflags': cflags},
+  'test_dczeroa.c': {'cflags': cflags},
   'test_dotnew.S': {'cflags': asmflags},
   'test_ext.S': {'cflags': asmflags},
   'test_fibonacci.S': {'cflags': asmflags},
diff --git a/tests/tcg/hexagon/test_dczeroa.c b/tests/tcg/hexagon/test_dczeroa.c
new file mode 100644
index 0000000000..8cdcdd6a3b
--- /dev/null
+++ b/tests/tcg/hexagon/test_dczeroa.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+/*
+ * Test the dczeroa instruction, which zeroes a 32-byte cache line.
+ * The address is rounded down to a 32-byte boundary: (addr & ~0x1f).
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <hexagon_protos.h>
+
+int err;
+
+#include "hex_test.h"
+
+static uint8_t buf[128] __attribute__((aligned(32)));
+
+/* dczeroa with an aligned address */
+static void test_dczeroa_aligned(void)
+{
+    int i;
+
+    memset(buf, 0xff, sizeof(buf));
+
+    Q6_dczeroa_A(&buf[32]);
+
+    for (i = 0; i < 32; i++) {
+        check32(buf[i], 0xff);
+    }
+    for (i = 32; i < 64; i++) {
+        check32(buf[i], 0x00);
+    }
+    for (i = 64; i < 96; i++) {
+        check32(buf[i], 0xff);
+    }
+}
+
+/* dczeroa with an unaligned address (should round down) */
+static void test_dczeroa_unaligned(void)
+{
+    int i;
+
+    memset(buf, 0xff, sizeof(buf));
+
+    /* Address buf+40 rounds down to buf+32 */
+    Q6_dczeroa_A(&buf[40]);
+
+    for (i = 0; i < 32; i++) {
+        check32(buf[i], 0xff);
+    }
+    for (i = 32; i < 64; i++) {
+        check32(buf[i], 0x00);
+    }
+    for (i = 64; i < 96; i++) {
+        check32(buf[i], 0xff);
+    }
+}
+
+/* dczeroa at the start of the buffer */
+static void test_dczeroa_start(void)
+{
+    int i;
+
+    memset(buf, 0xff, sizeof(buf));
+
+    Q6_dczeroa_A(&buf[0]);
+
+    for (i = 0; i < 32; i++) {
+        check32(buf[i], 0x00);
+    }
+    for (i = 32; i < 64; i++) {
+        check32(buf[i], 0xff);
+    }
+}
+
+int main(void)
+{
+    test_dczeroa_aligned();
+    test_dczeroa_unaligned();
+    test_dczeroa_start();
+
+    puts(err ? "FAIL" : "PASS");
+    return err ? 1 : 0;
+}