Commit 26f45c65a6 for openssl.org

commit 26f45c65a68e5e3d9617d1f37b1901c2caff6663
Author: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
Date:   Mon Sep 28 14:48:58 2026 +0000

    Enable SHA3 acceleration for Neoverse N3/V3

    Mark Arm Neoverse N3 and V3 as platforms where the SHA3 accelerated
    Keccak path is worth using. This enables the optimized SHA3/SHAKE
    implementation on these cores, providing better performance.
    Behaviour is unchanged on platforms without Armv8.2-A FEAT_SHA3 support.

    Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
    Reviewed-by: Paul Dale <paul.dale@oracle.com>
    Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com>
    Reviewed-by: Eugene Syromiatnikov <esyr@openssl.org>
    Merge-date: Fri Oct  9 22:58:13 2026
    Merged-from: https://github.com/openssl/openssl/pull/33057

diff --git a/crypto/armcap.c b/crypto/armcap.c
index 82482a2e10..5ada5006be 100644
--- a/crypto/armcap.c
+++ b/crypto/armcap.c
@@ -470,7 +470,9 @@ void OPENSSL_cpuid_setup(void)
             || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX)
             || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)
             || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_QCOMM, QCOM_CPU_PART_ORYON_X1)
-            || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_OLYMPUS)))
+            || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_OLYMPUS)
+            || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N3)
+            || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V3)))
         OPENSSL_armcap_P |= ARMV8_HAVE_SHA3_AND_WORTH_USING;

     if (OPENSSL_armcap_P & ARMV9_SVE2) {