Commit 345b1264df for ffmpeg
commit 345b1264df29f1f0d44c2322826908efd58b2ddf
Author: Zuxy Meng <zuxy.meng@gmail.com>
Date: Mon Nov 2 20:14:00 2026 -0800
avcodec/x86/vp9: convert dl/vl/hd 4x4 predictors MMX to XMM
Convert the 4x4 diag-down-left, vert-left and hor-down
predictors from MMX/MMXEXT to XMM registers. dl keeps the
_ssse3 name (it uses pshufb); vl and hd use only SSE2
instructions, so they are _sse2 from the start.
Benchmarks (checkasm, Zen 4, pinned, median of 3, cycles):
vp9_diag_downleft_4x4_ssse3: 1.9 -> 1.1
vp9_vert_left_4x4_sse2: 1.8 (mmxext) -> 1.1
vp9_hor_down_4x4_sse2: 2.2 (mmxext) -> 1.8
checkasm --test=vp9dsp passes (1272/1272, fresh build).
Signed-off-by: Zuxy Meng <zuxy.meng@gmail.com>
diff --git a/libavcodec/x86/vp9dsp_init.c b/libavcodec/x86/vp9dsp_init.c
index d259009c80..7bba68d359 100644
--- a/libavcodec/x86/vp9dsp_init.c
+++ b/libavcodec/x86/vp9dsp_init.c
@@ -153,8 +153,6 @@ lpf_funcs(88, 16, avx);
void ff_vp9_ipred_##type##_##size##x##size##_##opt(uint8_t *dst, ptrdiff_t stride, \
const uint8_t *l, const uint8_t *a)
-ipred_func(4, hd, mmxext);
-ipred_func(4, vl, mmxext);
ipred_func(8, v, sse);
#define ipred_dc_funcs(size, opt) \
@@ -191,8 +189,15 @@ ipred_func(4, h, sse2);
ipred_dc_funcs(size, opt); \
ipred_dir_tm_h_funcs(size, opt)
-// FIXME hd/vl_4x4_ssse3 does not exist
-ipred_all_funcs(4, ssse3);
+ipred_dc_funcs(4, ssse3);
+ipred_func(4, tm, ssse3);
+ipred_func(4, dl, ssse3);
+ipred_func(4, dr, ssse3);
+ipred_func(4, hd, sse2);
+ipred_func(4, hu, ssse3);
+ipred_func(4, vl, sse2);
+ipred_func(4, vr, ssse3);
+ipred_func(4, h, ssse3);
ipred_all_funcs(8, ssse3);
ipred_all_funcs(16, ssse3);
ipred_all_funcs(32, ssse3);
@@ -239,8 +244,6 @@ av_cold void ff_vp9dsp_init_x86(VP9DSPContext *dsp, int bpp, int bitexact)
#define init_ipred(sz, opt, t, e) \
dsp->intra_pred[TX_##sz##X##sz][e##_PRED] = ff_vp9_ipred_##t##_##sz##x##sz##_##opt
-#define ff_vp9_ipred_hd_4x4_ssse3 ff_vp9_ipred_hd_4x4_mmxext
-#define ff_vp9_ipred_vl_4x4_ssse3 ff_vp9_ipred_vl_4x4_mmxext
#define init_dir_tm_ipred(sz, opt) do { \
init_ipred(sz, opt, dl, DIAG_DOWN_LEFT); \
init_ipred(sz, opt, dr, DIAG_DOWN_RIGHT); \
@@ -278,8 +281,6 @@ av_cold void ff_vp9dsp_init_x86(VP9DSPContext *dsp, int bpp, int bitexact)
dsp->loop_filter_8[0][1] = ff_vp9_loop_filter_v_4_8_mmxext;
dsp->loop_filter_8[1][0] = ff_vp9_loop_filter_h_8_8_mmxext;
dsp->loop_filter_8[1][1] = ff_vp9_loop_filter_v_8_8_mmxext;
- dsp->intra_pred[TX_4X4][HOR_DOWN_PRED] = ff_vp9_ipred_hd_4x4_mmxext;
- dsp->intra_pred[TX_4X4][VERT_LEFT_PRED] = ff_vp9_ipred_vl_4x4_mmxext;
}
if (EXTERNAL_SSE(cpu_flags)) {
@@ -323,6 +324,8 @@ av_cold void ff_vp9dsp_init_x86(VP9DSPContext *dsp, int bpp, int bitexact)
init_dir_tm_h_ipred(16, sse2);
init_dir_tm_h_ipred(32, sse2);
init_ipred(4, sse2, h, HOR);
+ init_ipred(4, sse2, vl, VERT_LEFT);
+ init_ipred(4, sse2, hd, HOR_DOWN);
}
if (EXTERNAL_SSSE3(cpu_flags)) {
@@ -345,7 +348,13 @@ av_cold void ff_vp9dsp_init_x86(VP9DSPContext *dsp, int bpp, int bitexact)
dsp->itxfm_add[TX_32X32][DCT_ADST] =
dsp->itxfm_add[TX_32X32][DCT_DCT] = ff_vp9_idct_idct_32x32_add_ssse3;
init_lpf(ssse3);
- init_all_ipred(4, ssse3);
+ init_dc_ipred(4, ssse3);
+ init_ipred(4, ssse3, dl, DIAG_DOWN_LEFT);
+ init_ipred(4, ssse3, dr, DIAG_DOWN_RIGHT);
+ init_ipred(4, ssse3, hu, HOR_UP);
+ init_ipred(4, ssse3, tm, TM_VP8);
+ init_ipred(4, ssse3, vr, VERT_RIGHT);
+ init_ipred(4, ssse3, h, HOR);
init_all_ipred(8, ssse3);
init_all_ipred(16, ssse3);
init_all_ipred(32, ssse3);
diff --git a/libavcodec/x86/vp9intrapred.asm b/libavcodec/x86/vp9intrapred.asm
index 147f3bad68..710e59de80 100644
--- a/libavcodec/x86/vp9intrapred.asm
+++ b/libavcodec/x86/vp9intrapred.asm
@@ -733,15 +733,15 @@ TM_XMM_FUNCS
pavgb m%1, m%2
%endmacro
-INIT_MMX ssse3
-cglobal vp9_ipred_dl_4x4, 4, 4, 0, dst, stride, l, a
+INIT_XMM ssse3
+cglobal vp9_ipred_dl_4x4, 4, 4, 4, dst, stride, l, a
movq m1, [aq]
pshufb m0, m1, [pb_0to5_2x7]
pshufb m2, m1, [pb_2to6_3x7]
psrlq m1, 8
LOWPASS 0, 1, 2, 3
- pshufw m1, m0, q3321
+ pshuflw m1, m0, q3321
movd [dstq+strideq*0], m0
movd [dstq+strideq*2], m1
psrlq m0, 8
@@ -1025,8 +1025,8 @@ DR_XMM_FUNCS
; vl
-INIT_MMX mmxext
-cglobal vp9_ipred_vl_4x4, 4, 4, 0, dst, stride, l, a
+INIT_XMM sse2
+cglobal vp9_ipred_vl_4x4, 4, 4, 4, dst, stride, l, a
movq m0, [aq]
psrlq m1, m0, 8
psrlq m2, m1, 8
@@ -1390,10 +1390,11 @@ VR_XMM_FUNCS 6
; hd
-INIT_MMX mmxext
-cglobal vp9_ipred_hd_4x4, 4, 4, 0, dst, stride, l, a
+INIT_XMM sse2
+cglobal vp9_ipred_hd_4x4, 4, 4, 4, dst, stride, l, a
movd m0, [lq]
- punpckldq m0, [aq-1]
+ movq m3, [aq-1]
+ punpckldq m0, m3
DEFINE_ARGS dst, stride, stride3
lea stride3q, [strideq*3]
psrlq m1, m0, 8
@@ -1407,7 +1408,8 @@ cglobal vp9_ipred_hd_4x4, 4, 4, 0, dst, stride, l, a
; AEBF | m2 contains EFGHIJxx
punpcklbw m1, m2
- punpckhdq m0, m1, m2
+ punpckldq m0, m1, m2
+ psrldq m0, 8
; m1 contains AEBFCGDH
; m0 contains CGDHIJxx