Commit 9084c50cdb for qemu.org
commit 9084c50cdb4ea98202d518782e7ce8a9bccc8a80
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Fri Aug 28 05:03:26 2026 -0700
target/alpha: Use tcg_gen_lea_i64 for S{4,8}ADD{L,Q}
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index c66e3f9c14..6f18b8d1af 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -1474,10 +1474,8 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
break;
case 0x02:
/* S4ADDL */
- tmp = tcg_temp_new_i64();
- tcg_gen_shli_i64(tmp, va, 2);
- tcg_gen_add_i64(tmp, tmp, vb);
- tcg_gen_ext32s_i64(vc, tmp);
+ tcg_gen_lea_i64(vc, vb, va, 2, 0);
+ tcg_gen_ext32s_i64(vc, vc);
break;
case 0x09:
/* SUBL */
@@ -1502,10 +1500,8 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
break;
case 0x12:
/* S8ADDL */
- tmp = tcg_temp_new_i64();
- tcg_gen_shli_i64(tmp, va, 3);
- tcg_gen_add_i64(tmp, tmp, vb);
- tcg_gen_ext32s_i64(vc, tmp);
+ tcg_gen_lea_i64(vc, vb, va, 3, 0);
+ tcg_gen_ext32s_i64(vc, vc);
break;
case 0x1B:
/* S8SUBL */
@@ -1524,9 +1520,7 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
break;
case 0x22:
/* S4ADDQ */
- tmp = tcg_temp_new_i64();
- tcg_gen_shli_i64(tmp, va, 2);
- tcg_gen_add_i64(vc, tmp, vb);
+ tcg_gen_lea_i64(vc, vb, va, 2, 0);
break;
case 0x29:
/* SUBQ */
@@ -1544,9 +1538,7 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
break;
case 0x32:
/* S8ADDQ */
- tmp = tcg_temp_new_i64();
- tcg_gen_shli_i64(tmp, va, 3);
- tcg_gen_add_i64(vc, tmp, vb);
+ tcg_gen_lea_i64(vc, vb, va, 3, 0);
break;
case 0x3B:
/* S8SUBQ */