Commit b056ca4d3742 for kernel

commit b056ca4d3742d0769f91137bb1ce3215428398f7
Author: Li RongQing <lirongqing@baidu.com>
Date:   Tue Oct 6 13:58:20 2026 +0300

    net/mlx5e: Order ICOSQ cc update after CQ doorbell

    mlx5e_poll_ico_cq() requires sq->cc to be updated only after
    mlx5_cqwq_update_db_record(), otherwise a CQ overrun may occur.

    The current implementation updates sq->cc before the CQ doorbell
    record, violating this ordering requirement.

    Update the CQ doorbell record first and use dma_wmb() before updating
    sq->cc. This ensures that the CQ space is released to the device
    before the corresponding ICOSQ consumer index is updated by software.

    Fixes: fd9b4be8002c ("net/mlx5e: RX, Support multiple outstanding UMR posts")
    Signed-off-by: Li RongQing <lirongqing@baidu.com>
    Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
    Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
    Reviewed-by: Daniel Machon <daniel.machon@microchip.com>
    Link: https://patch.msgid.link/20261006105820.257208-1-tariqt@nvidia.com
    Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
index 7bd0606a5253..903af3b3e779 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
@@ -908,10 +908,12 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
 		} while (!last_wqe);
 	} while ((++i < MLX5E_TX_CQ_POLL_BUDGET) && (cqe = mlx5_cqwq_get_cqe(&cq->wq)));

-	sq->cc = sqcc;
-
 	mlx5_cqwq_update_db_record(&cq->wq);

+	/* ensure cq space is freed before enabling more cqes */
+	dma_wmb();
+
+	sq->cc = sqcc;
 	return i;
 }