Commit 0da84325e4 for qemu.org

commit 0da84325e472b43169135010b3dd75e85ca37092
Author: Richard Henderson <richard.henderson@linaro.org>
Date:   Wed Aug 12 15:31:26 2026 -0700

    disas/riscv: Skip post-processing of illegal insns

    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
    Message-ID: <20260812223142.349142-37-richard.henderson@linaro.org>
    Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

diff --git a/disas/riscv.c b/disas/riscv.c
index bc86cb866a..75c2fa11e6 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -5321,12 +5321,14 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst,
             }
         }
     }
-    if (!op) {
+
+    if (op) {
+        decode_inst_operands(&dec, isa, op);
+        op = decode_inst_lift_pseudo(&dec, op);
+    } else {
         op = &rvi_opcode_data[rv_op_illegal];
     }

-    decode_inst_operands(&dec, isa, op);
-    op = decode_inst_lift_pseudo(&dec, op);
     return format_inst(24, &dec, op);
 }