Commit 3d497826c3 for qemu.org

commit 3d497826c3c16a19ba52c00dff7d71a1cda07cbc
Author: Zhao Liu <zhao1.liu@intel.com>
Date:   Mon Dec 15 15:37:40 2025 +0800

    i386/cpu: Add an option in X86CPUDefinition to control CPUID 0x1f

    Many Intel CPUs enable CPUID 0x1f by default to encode CPU topology
    information.

    Add the "cpuid_0x1f" option to X86CPUDefinition to allow named CPU
    models to configure CPUID 0x1f from the start, thereby forcing 0x1f
    to be present for guest.

    With this option, there's no need to explicitly add v1 model to an
    unversioned CPU model for explicitly enabling the x-force-cpuid-0x1f
    property.

    Tested-by: Xudong Hao <xudong.hao@intel.com>
    Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
    Link: https://lore.kernel.org/r/20251215073743.4055227-9-zhao1.liu@intel.com
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 4ed7f4f1c9..49a8f30feb 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2313,6 +2313,12 @@ typedef struct X86CPUDefinition {
     int model;
     int stepping;
     uint8_t avx10_version;
+    /*
+     * Whether to present CPUID 0x1f by default.
+     * If true, encode CPU topology in 0x1f leaf even if there's no
+     * extended topology levels.
+     */
+    bool cpuid_0x1f;
     FeatureWordArray features;
     const char *model_id;
     const CPUCaches *const cache_info;
@@ -8014,6 +8020,10 @@ static void x86_cpu_load_model(X86CPU *cpu, const X86CPUModel *model)
                                  def->avx10_version, &error_abort);
     }

+    if (def->cpuid_0x1f) {
+        object_property_set_bool(OBJECT(cpu), "x-force-cpuid-0x1f",
+                                 def->cpuid_0x1f, &error_abort);
+    }
     x86_cpu_apply_version_props(cpu, model);

     /*