Commit 423b0ac34c for qemu.org
commit 423b0ac34ca8dd19fc27b8518b6234227ac320a5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Thu Feb 26 11:27:18 2026 +0000
target/arm: Move kvm_arm_sve_get_vls within kvm.c
Prepare to adjust the invocation point and visibility.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index c46ee9620b..2b74901d54 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -243,6 +243,60 @@ static int get_host_cpu_reg(int fd, ARMHostCPUFeatures *ahcf,
return ret;
}
+uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu)
+{
+ /* Only call this function if kvm_arm_sve_supported() returns true. */
+ static uint64_t vls[KVM_ARM64_SVE_VLS_WORDS];
+ static bool probed;
+ uint32_t vq = 0;
+ int i;
+
+ /*
+ * KVM ensures all host CPUs support the same set of vector lengths.
+ * So we only need to create the scratch VCPUs once and then cache
+ * the results.
+ */
+ if (!probed) {
+ struct kvm_vcpu_init init = {
+ .target = -1,
+ .features[0] = (1 << KVM_ARM_VCPU_SVE),
+ };
+ struct kvm_one_reg reg = {
+ .id = KVM_REG_ARM64_SVE_VLS,
+ .addr = (uint64_t)&vls[0],
+ };
+ int fdarray[3], ret;
+
+ probed = true;
+
+ if (!kvm_arm_create_scratch_host_vcpu(fdarray, &init)) {
+ error_report("failed to create scratch VCPU with SVE enabled");
+ abort();
+ }
+ ret = ioctl(fdarray[2], KVM_GET_ONE_REG, ®);
+ kvm_arm_destroy_scratch_host_vcpu(fdarray);
+ if (ret) {
+ error_report("failed to get KVM_REG_ARM64_SVE_VLS: %s",
+ strerror(errno));
+ abort();
+ }
+
+ for (i = KVM_ARM64_SVE_VLS_WORDS - 1; i >= 0; --i) {
+ if (vls[i]) {
+ vq = 64 - clz64(vls[i]) + i * 64;
+ break;
+ }
+ }
+ if (vq > ARM_MAX_VQ) {
+ warn_report("KVM supports vector lengths larger than "
+ "QEMU can enable");
+ vls[0] &= MAKE_64BIT_MASK(0, ARM_MAX_VQ);
+ }
+ }
+
+ return vls[0];
+}
+
static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
{
/* Identify the feature bits corresponding to the host CPU, and
@@ -1914,60 +1968,6 @@ bool kvm_arm_mte_supported(void)
QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN != 1);
-uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu)
-{
- /* Only call this function if kvm_arm_sve_supported() returns true. */
- static uint64_t vls[KVM_ARM64_SVE_VLS_WORDS];
- static bool probed;
- uint32_t vq = 0;
- int i;
-
- /*
- * KVM ensures all host CPUs support the same set of vector lengths.
- * So we only need to create the scratch VCPUs once and then cache
- * the results.
- */
- if (!probed) {
- struct kvm_vcpu_init init = {
- .target = -1,
- .features[0] = (1 << KVM_ARM_VCPU_SVE),
- };
- struct kvm_one_reg reg = {
- .id = KVM_REG_ARM64_SVE_VLS,
- .addr = (uint64_t)&vls[0],
- };
- int fdarray[3], ret;
-
- probed = true;
-
- if (!kvm_arm_create_scratch_host_vcpu(fdarray, &init)) {
- error_report("failed to create scratch VCPU with SVE enabled");
- abort();
- }
- ret = ioctl(fdarray[2], KVM_GET_ONE_REG, ®);
- kvm_arm_destroy_scratch_host_vcpu(fdarray);
- if (ret) {
- error_report("failed to get KVM_REG_ARM64_SVE_VLS: %s",
- strerror(errno));
- abort();
- }
-
- for (i = KVM_ARM64_SVE_VLS_WORDS - 1; i >= 0; --i) {
- if (vls[i]) {
- vq = 64 - clz64(vls[i]) + i * 64;
- break;
- }
- }
- if (vq > ARM_MAX_VQ) {
- warn_report("KVM supports vector lengths larger than "
- "QEMU can enable");
- vls[0] &= MAKE_64BIT_MASK(0, ARM_MAX_VQ);
- }
- }
-
- return vls[0];
-}
-
static int kvm_arm_sve_set_vls(ARMCPU *cpu)
{
uint64_t vls[KVM_ARM64_SVE_VLS_WORDS] = { cpu->sve_vq.map };