Commit 459ad31d7e for qemu.org
commit 459ad31d7ed04632fb5fd42c04925d8113184b26
Author: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Date: Fri Aug 28 17:39:16 2026 -0300
hw/riscv/device-common, virt.c: add riscv_gpex_pcie_init()
The GPEX_HOST initialization in 'virt' can be moved to device-common.c
and be re-used later for other boards, namely the future
'riscv-server-ref' emulation.
Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Chao Liu <chao.liu@processmission.com>
Message-ID: <20260828203918.350131-15-daniel.barboza@oss.qualcomm.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
diff --git a/hw/riscv/device-common.c b/hw/riscv/device-common.c
index a054cd7114..d1a6814f87 100644
--- a/hw/riscv/device-common.c
+++ b/hw/riscv/device-common.c
@@ -15,6 +15,8 @@
#include "hw/core/qdev.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/sysbus.h"
+#include "hw/pci/pci.h"
+#include "hw/pci-host/gpex.h"
#include "qapi/error.h"
#include "qom/object.h"
#include "system/address-spaces.h"
@@ -90,3 +92,77 @@ void riscv_init_flash_map(PFlashCFI01 *flash, hwaddr base, hwaddr size,
memory_region_add_subregion(sysmem, base,
sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
}
+
+DeviceState *riscv_gpex_pcie_init(MemoryRegion *sys_mem,
+ DeviceState *irqchip,
+ const MemMapEntry *pcie_ecam_mem,
+ const MemMapEntry *pcie_mmio_mem,
+ const MemMapEntry *high_pcie_mmio_mem,
+ const MemMapEntry *pcie_pio_mem,
+ int pcie_irq)
+{
+ DeviceState *dev;
+ MemoryRegion *ecam_alias, *ecam_reg;
+ MemoryRegion *mmio_alias, *high_mmio_alias, *mmio_reg;
+ hwaddr ecam_base = pcie_ecam_mem->base;
+ hwaddr ecam_size = pcie_ecam_mem->size;
+ hwaddr mmio_base = pcie_mmio_mem->base;
+ hwaddr mmio_size = pcie_mmio_mem->size;
+ hwaddr high_mmio_base = high_pcie_mmio_mem->base;
+ hwaddr high_mmio_size = high_pcie_mmio_mem->size;
+ hwaddr pio_base = pcie_pio_mem->base;
+ hwaddr pio_size = pcie_pio_mem->size;
+
+ dev = qdev_new(TYPE_GPEX_HOST);
+
+ /* Set GPEX object properties for the virt machine */
+ object_property_set_uint(OBJECT(dev), PCI_HOST_ECAM_BASE,
+ ecam_base, NULL);
+ object_property_set_int(OBJECT(dev), PCI_HOST_ECAM_SIZE,
+ ecam_size, NULL);
+ object_property_set_uint(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_BASE,
+ mmio_base, NULL);
+ object_property_set_int(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_SIZE,
+ mmio_size, NULL);
+ object_property_set_uint(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_BASE,
+ high_mmio_base, NULL);
+ object_property_set_int(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_SIZE,
+ high_mmio_size, NULL);
+ object_property_set_uint(OBJECT(dev), PCI_HOST_PIO_BASE,
+ pio_base, NULL);
+ object_property_set_int(OBJECT(dev), PCI_HOST_PIO_SIZE,
+ pio_size, NULL);
+
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+
+ ecam_alias = g_new0(MemoryRegion, 1);
+ ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
+ memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
+ ecam_reg, 0, ecam_size);
+ memory_region_add_subregion(get_system_memory(), ecam_base, ecam_alias);
+
+ mmio_alias = g_new0(MemoryRegion, 1);
+ mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
+ memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
+ mmio_reg, mmio_base, mmio_size);
+ memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias);
+
+ /* Map high MMIO space */
+ high_mmio_alias = g_new0(MemoryRegion, 1);
+ memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high",
+ mmio_reg, high_mmio_base, high_mmio_size);
+ memory_region_add_subregion(get_system_memory(), high_mmio_base,
+ high_mmio_alias);
+
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base);
+
+ for (int i = 0; i < PCI_NUM_PINS; i++) {
+ qemu_irq irq = qdev_get_gpio_in(irqchip, pcie_irq + i);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
+ gpex_set_irq_num(GPEX_HOST(dev), i, pcie_irq + i);
+ }
+
+ GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus;
+ return dev;
+}
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 255d5ca3b3..f725cb9110 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -539,78 +539,6 @@ static void create_fdt(RISCVVirtState *s)
create_fdt_pmu(s);
}
-static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem,
- DeviceState *irqchip,
- RISCVVirtState *s)
-{
- DeviceState *dev;
- MemoryRegion *ecam_alias, *ecam_reg;
- MemoryRegion *mmio_alias, *high_mmio_alias, *mmio_reg;
- hwaddr ecam_base = s->memmap[VIRT_PCIE_ECAM].base;
- hwaddr ecam_size = s->memmap[VIRT_PCIE_ECAM].size;
- hwaddr mmio_base = s->memmap[VIRT_PCIE_MMIO].base;
- hwaddr mmio_size = s->memmap[VIRT_PCIE_MMIO].size;
- hwaddr high_mmio_base = virt_high_pcie_memmap.base;
- hwaddr high_mmio_size = virt_high_pcie_memmap.size;
- hwaddr pio_base = s->memmap[VIRT_PCIE_PIO].base;
- hwaddr pio_size = s->memmap[VIRT_PCIE_PIO].size;
- qemu_irq irq;
- int i;
-
- dev = qdev_new(TYPE_GPEX_HOST);
-
- /* Set GPEX object properties for the virt machine */
- object_property_set_uint(OBJECT(dev), PCI_HOST_ECAM_BASE,
- ecam_base, NULL);
- object_property_set_int(OBJECT(dev), PCI_HOST_ECAM_SIZE,
- ecam_size, NULL);
- object_property_set_uint(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_BASE,
- mmio_base, NULL);
- object_property_set_int(OBJECT(dev), PCI_HOST_BELOW_4G_MMIO_SIZE,
- mmio_size, NULL);
- object_property_set_uint(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_BASE,
- high_mmio_base, NULL);
- object_property_set_int(OBJECT(dev), PCI_HOST_ABOVE_4G_MMIO_SIZE,
- high_mmio_size, NULL);
- object_property_set_uint(OBJECT(dev), PCI_HOST_PIO_BASE,
- pio_base, NULL);
- object_property_set_int(OBJECT(dev), PCI_HOST_PIO_SIZE,
- pio_size, NULL);
-
- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
-
- ecam_alias = g_new0(MemoryRegion, 1);
- ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
- memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
- ecam_reg, 0, ecam_size);
- memory_region_add_subregion(get_system_memory(), ecam_base, ecam_alias);
-
- mmio_alias = g_new0(MemoryRegion, 1);
- mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
- memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
- mmio_reg, mmio_base, mmio_size);
- memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias);
-
- /* Map high MMIO space */
- high_mmio_alias = g_new0(MemoryRegion, 1);
- memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high",
- mmio_reg, high_mmio_base, high_mmio_size);
- memory_region_add_subregion(get_system_memory(), high_mmio_base,
- high_mmio_alias);
-
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, pio_base);
-
- for (i = 0; i < PCI_NUM_PINS; i++) {
- irq = qdev_get_gpio_in(irqchip, PCIE_IRQ + i);
-
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
- gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ + i);
- }
-
- GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus;
- return dev;
-}
-
static FWCfgState *create_fw_cfg(const MachineState *ms, hwaddr base)
{
FWCfgState *fw_cfg;
@@ -962,7 +890,10 @@ static void virt_machine_init(MachineState *machine)
qdev_get_gpio_in(virtio_irqchip, VIRTIO_IRQ + i));
}
- gpex_pcie_init(system_memory, pcie_irqchip, s);
+ riscv_gpex_pcie_init(system_memory, pcie_irqchip,
+ &s->memmap[VIRT_PCIE_ECAM], &s->memmap[VIRT_PCIE_MMIO],
+ &virt_high_pcie_memmap, &s->memmap[VIRT_PCIE_PIO],
+ PCIE_IRQ);
s->platform_bus_dev = riscv_create_platform_bus(mmio_irqchip,
&s->memmap[VIRT_PLATFORM_BUS], VIRT_PLATFORM_BUS_IRQ,
diff --git a/include/hw/riscv/device-common.h b/include/hw/riscv/device-common.h
index 9f8bc67a1d..572912ec36 100644
--- a/include/hw/riscv/device-common.h
+++ b/include/hw/riscv/device-common.h
@@ -22,4 +22,11 @@ PFlashCFI01 *riscv_flash_create(Object *parent, const char *name,
int flash_sector_size);
void riscv_init_flash_map(PFlashCFI01 *flash, hwaddr base, hwaddr size,
MemoryRegion *sysmem, int flash_sector_size);
+DeviceState *riscv_gpex_pcie_init(MemoryRegion *sys_mem,
+ DeviceState *irqchip,
+ const MemMapEntry *pcie_ecam_mem,
+ const MemMapEntry *pcie_mmio_mem,
+ const MemMapEntry *high_pcie_mmio_mem,
+ const MemMapEntry *pcie_pio_mem,
+ int pcie_irq);
#endif