Commit 4b998857a9 for qemu.org
commit 4b998857a96d0c26fbfe1cec4548406fc895a619
Author: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Date: Tue Aug 25 14:41:32 2026 +0100
hw/acpi/ich9.c: convert object props in ICH9_LPC_DEVICE to class props
ACPI_PM_PROP_TCO_ENABLED, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE and x-keep-pci-slot-hpc
properties can be converted to use object_class_property_add_bool_ptr(). Remove
the now unused ich9_pm_add_properties() function.
Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20260825134320.1039012-12-mark.caveayland@nutanix.com>
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 774b34195f..d6df8db21f 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -349,46 +349,6 @@ static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
visit_type_uint32(v, name, &value, errp);
}
-static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
-{
- ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
- return s->pm.enable_tco;
-}
-
-static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
-{
- ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
- s->pm.enable_tco = value;
-}
-
-static bool ich9_pm_get_acpi_pci_hotplug(Object *obj, Error **errp)
-{
- ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
-
- return s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge;
-}
-
-static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp)
-{
- ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
-
- s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge = value;
-}
-
-static bool ich9_pm_get_keep_pci_slot_hpc(Object *obj, Error **errp)
-{
- ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
-
- return s->pm.keep_pci_slot_hpc;
-}
-
-static void ich9_pm_set_keep_pci_slot_hpc(Object *obj, bool value, Error **errp)
-{
- ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
-
- s->pm.keep_pci_slot_hpc = value;
-}
-
void ich9_pm_reset_properties(ICH9LPCPMRegs *pm)
{
pm->acpi_memory_hotplug.is_enabled = true;
@@ -400,35 +360,10 @@ void ich9_pm_reset_properties(ICH9LPCPMRegs *pm)
pm->enable_tco = true;
}
-void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
-{
- object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
- &pm->pm_io_base, OBJ_PROP_FLAG_READ);
- object_property_add_link(obj, "bus", TYPE_PCI_BUS,
- (Object **)&pm->acpi_pci_hotplug.root,
- object_property_allow_set_link,
- OBJ_PROP_LINK_STRONG);
- object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
- ich9_pm_get_gpe0_blk,
- NULL, NULL, NULL);
- object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
- &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
- object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
- &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
- object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
- &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
- object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
- ich9_pm_get_enable_tco,
- ich9_pm_set_enable_tco);
- object_property_add_bool(obj, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
- ich9_pm_get_acpi_pci_hotplug,
- ich9_pm_set_acpi_pci_hotplug);
- object_property_add_bool(obj, "x-keep-pci-slot-hpc",
- ich9_pm_get_keep_pci_slot_hpc,
- ich9_pm_set_keep_pci_slot_hpc);
-}
+#define PM_REG_FIELD(n) \
+ (pm_offset + offsetof(ICH9LPCPMRegs, n))
-void ich9_pm_add_class_properties(ObjectClass *oc)
+void ich9_pm_add_class_properties(ObjectClass *oc, ptrdiff_t pm_offset)
{
static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
@@ -436,8 +371,39 @@ void ich9_pm_add_class_properties(ObjectClass *oc)
ACPI_PM_PROP_GPE0_BLK_LEN,
&gpe0_len,
OBJ_PROP_FLAG_READ);
+ object_class_property_add_uint32_ptr(oc, ACPI_PM_PROP_PM_IO_BASE,
+ PM_REG_FIELD(pm_io_base),
+ OBJ_PROP_FLAG_READ);
+ object_class_property_add_link(oc, "bus",
+ TYPE_PCI_BUS,
+ PM_REG_FIELD(acpi_pci_hotplug.root),
+ object_property_allow_set_link,
+ OBJ_PROP_LINK_STRONG);
+ object_class_property_add(oc, ACPI_PM_PROP_GPE0_BLK, "uint32",
+ ich9_pm_get_gpe0_blk,
+ NULL, NULL, NULL);
+ object_class_property_add_uint8_ptr(oc, ACPI_PM_PROP_S3_DISABLED,
+ PM_REG_FIELD(disable_s3),
+ OBJ_PROP_FLAG_READWRITE);
+ object_class_property_add_uint8_ptr(oc, ACPI_PM_PROP_S4_DISABLED,
+ PM_REG_FIELD(disable_s4),
+ OBJ_PROP_FLAG_READWRITE);
+ object_class_property_add_uint8_ptr(oc, ACPI_PM_PROP_S4_VAL,
+ PM_REG_FIELD(s4_val),
+ OBJ_PROP_FLAG_READWRITE);
+ object_class_property_add_bool_ptr(oc, ACPI_PM_PROP_TCO_ENABLED,
+ PM_REG_FIELD(enable_tco),
+ OBJ_PROP_FLAG_READWRITE);
+ object_class_property_add_bool_ptr(oc, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
+ PM_REG_FIELD(acpi_pci_hotplug.use_acpi_hotplug_bridge),
+ OBJ_PROP_FLAG_READWRITE);
+ object_class_property_add_bool_ptr(oc, "x-keep-pci-slot-hpc",
+ PM_REG_FIELD(keep_pci_slot_hpc),
+ OBJ_PROP_FLAG_READWRITE);
}
+#undef PM_REG_FIELD
+
void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
Error **errp)
{
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index d3f1358887..b55b5136a3 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -689,7 +689,6 @@ static void ich9_lpc_initfn(Object *obj)
IOAPIC_NUM_PINS);
ich9_pm_reset_properties(&lpc->pm);
- ich9_pm_add_properties(obj, &lpc->pm);
}
static void ich9_lpc_realize(PCIDevice *d, Error **errp)
@@ -920,7 +919,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, const void *data)
&acpi_disable_cmd,
OBJ_PROP_FLAG_READ);
- ich9_pm_add_class_properties(klass);
+ ich9_pm_add_class_properties(klass, offsetof(ICH9LPCState, pm));
}
static const TypeInfo ich9_lpc_info = {
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 3fb993bb9e..6d14544751 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -83,8 +83,7 @@ extern const VMStateDescription vmstate_ich9_pm;
void ich9_pm_reset_properties(ICH9LPCPMRegs *pm);
-void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm);
-void ich9_pm_add_class_properties(ObjectClass *oc);
+void ich9_pm_add_class_properties(ObjectClass *oc, ptrdiff_t pm_offset);
void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
Error **errp);