Commit 4ddd7588fae6 for kernel

commit 4ddd7588fae6175e748cff22c79faafb4d455d42
Author: Arnaldo Carvalho de Melo <acme@redhat.com>
Date:   Wed Mar 18 15:42:16 2026 -0300

    tools arch x86: Sync the msr-index.h copy with the kernel sources

    To pick up the changes from these csets:

      9073428bb204d921 ("x86/sev: Allow IBPB-on-Entry feature for SNP guests")

    That cause no changes to tooling as it doesn't include a new MSR to be
    captured by the tools/perf/trace/beauty/tracepoints/x86_msr.sh script.

    Just silences this perf build warning:

      Warning: Kernel ABI header differences:
        diff -u tools/arch/x86/include/asm/msr-index.h arch/x86/include/asm/msr-index.h

    Cc: Borislav Petkov (AMD) <bp@alien8.de>
    Cc: Kim Phillips <kim.phillips@amd.com>
    Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
index da5275d8eda6..6673601246b3 100644
--- a/tools/arch/x86/include/asm/msr-index.h
+++ b/tools/arch/x86/include/asm/msr-index.h
@@ -740,7 +740,10 @@
 #define MSR_AMD64_SNP_SMT_PROT		BIT_ULL(MSR_AMD64_SNP_SMT_PROT_BIT)
 #define MSR_AMD64_SNP_SECURE_AVIC_BIT	18
 #define MSR_AMD64_SNP_SECURE_AVIC	BIT_ULL(MSR_AMD64_SNP_SECURE_AVIC_BIT)
-#define MSR_AMD64_SNP_RESV_BIT		19
+#define MSR_AMD64_SNP_RESERVED_BITS19_22 GENMASK_ULL(22, 19)
+#define MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT	23
+#define MSR_AMD64_SNP_IBPB_ON_ENTRY	BIT_ULL(MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT)
+#define MSR_AMD64_SNP_RESV_BIT		24
 #define MSR_AMD64_SNP_RESERVED_MASK	GENMASK_ULL(63, MSR_AMD64_SNP_RESV_BIT)
 #define MSR_AMD64_SAVIC_CONTROL		0xc0010138
 #define MSR_AMD64_SAVIC_EN_BIT		0