Commit 62fbcab71c for qemu.org
commit 62fbcab71c39f4dda75b0994d11583ed4407dc24
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Wed Aug 26 10:41:56 2026 -0700
target/arm: Remove DO_ZPZZ_AH_FP_B16 from translate-sme.c
Expand the macro at each use site.
Merge the two arrays and index by fpcr_ah.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260826174213.614571-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index 6e984d02f8..f65c2b0af5 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -4425,19 +4425,6 @@ TRANS_FEAT_NONSTREAMING(FTSMUL, aa64_sve, gen_gvec_fpst_arg_zzz,
*** SVE Floating Point Arithmetic - Predicated Group
*/
-#define DO_ZPZZ_AH_FP_B16(NAME, FEAT, name, ah_name) \
- static gen_helper_gvec_4_ptr * const name##_zpzz_fns[4] = { \
- gen_helper_##name##_b16, gen_helper_##name##_h, \
- gen_helper_##name##_s, gen_helper_##name##_d \
- }; \
- static gen_helper_gvec_4_ptr * const name##_ah_zpzz_fns[4] = { \
- gen_helper_##ah_name##_b16, gen_helper_##ah_name##_h, \
- gen_helper_##ah_name##_s, gen_helper_##ah_name##_d \
- }; \
- TRANS_FEAT(NAME, FEAT, gen_gvec_fpst_arg_zpzz, \
- s->fpcr_ah ? name##_ah_zpzz_fns[a->esz] : \
- name##_zpzz_fns[a->esz], a)
-
static gen_helper_gvec_4_ptr * const sve_fadd_zpzz_fns[4] = {
gen_helper_sve_fadd_b16,
gen_helper_sve_fadd_h,
@@ -4465,8 +4452,23 @@ static gen_helper_gvec_4_ptr * const sve_fmul_zpzz_fns[4] = {
TRANS_FEAT(FMUL_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
sve_fmul_zpzz_fns[a->esz], a)
-DO_ZPZZ_AH_FP_B16(FMIN_zpzz, aa64_sme_or_sve, sve_fmin, sve_ah_fmin)
-DO_ZPZZ_AH_FP_B16(FMAX_zpzz, aa64_sme_or_sve, sve_fmax, sve_ah_fmax)
+static gen_helper_gvec_4_ptr * const sve_fmin_fns[4][2] = {
+ { gen_helper_sve_fmin_b16, gen_helper_sve_ah_fmin_b16 },
+ { gen_helper_sve_fmin_h, gen_helper_sve_ah_fmin_h },
+ { gen_helper_sve_fmin_s, gen_helper_sve_ah_fmin_s },
+ { gen_helper_sve_fmin_d, gen_helper_sve_ah_fmin_d },
+};
+TRANS_FEAT(FMIN_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
+ sve_fmin_fns[a->esz][s->fpcr_ah], a)
+
+static gen_helper_gvec_4_ptr * const sve_fmax_fns[4][2] = {
+ { gen_helper_sve_fmax_b16, gen_helper_sve_ah_fmax_b16 },
+ { gen_helper_sve_fmax_h, gen_helper_sve_ah_fmax_h },
+ { gen_helper_sve_fmax_s, gen_helper_sve_ah_fmax_s },
+ { gen_helper_sve_fmax_d, gen_helper_sve_ah_fmax_d },
+};
+TRANS_FEAT(FMAX_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
+ sve_fmax_fns[a->esz][s->fpcr_ah], a)
static gen_helper_gvec_4_ptr * const sve_fmaxnum_fns[4] = {
gen_helper_sve_fmaxnum_b16,