Commit 669683cf14 for qemu.org

commit 669683cf1414ce442d2faea160dbc69747aef007
Author: Weixie Cui <cuiweixie@gmail.com>
Date:   Thu Feb 26 11:27:18 2026 +0000

    hw/ssi/xilinx_spips: Reset TX FIFO in reset

    In xilinx_spips_reset() and xlnx_zynqmp_qspips_reset() a cut and
    paste error meant we reset the RX FIFO twice and the TX FIFO not at
    all.  Correct this to reset both FIFOs.

    Cc: qemu-stable@nongnu.org
    Signed-off-by: Weixie Cui <cuiweixie@gmail.com>
    Reviewed-by: Thomas Huth <thuth@redhat.com>
    Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
    Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
    Message-id: 20260223095905.67709-1-cuiweixie@gmail.com
    [Rewrote commit message]
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index a4718fb72d..f6e717bc01 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -369,7 +369,7 @@ static void xilinx_spips_reset(DeviceState *d)
     memset(s->regs, 0, sizeof(s->regs));

     fifo8_reset(&s->rx_fifo);
-    fifo8_reset(&s->rx_fifo);
+    fifo8_reset(&s->tx_fifo);
     /* non zero resets */
     s->regs[R_CONFIG] |= MODEFAIL_GEN_EN;
     s->regs[R_SLAVE_IDLE_COUNT] = 0xFF;
@@ -397,7 +397,7 @@ static void xlnx_zynqmp_qspips_reset(DeviceState *d)
     memset(s->regs, 0, sizeof(s->regs));

     fifo8_reset(&s->rx_fifo_g);
-    fifo8_reset(&s->rx_fifo_g);
+    fifo8_reset(&s->tx_fifo_g);
     fifo32_reset(&s->fifo_g);
     s->regs[R_INTR_STATUS] = R_INTR_STATUS_RESET;
     s->regs[R_GPIO] = 1;