Commit 6d595cfdc6 for qemu.org
commit 6d595cfdc674e963af77386567d35a4594f06ab6
Author: Joel Stanley <joel@jms.id.au>
Date: Thu Sep 3 15:21:18 2026 +0930
hw/intc/riscv_aplic: Take a MemoryRegion for the created device
riscv_aplic_create() maps the device it creates into system_memory,
which prevents its use by SoCs that map devices into their own memory
container.
Add a MemoryRegion parameter and map the device into it instead of
calling sysbus_mmio_map(). The mapping still only happens when the
APLIC is emulated. All callers pass system_memory, so there is no
change in behaviour.
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-ID: <20260903055131.257903-5-joel@jms.id.au>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index 84606e9f3d..d8e25bfda1 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -1109,9 +1109,10 @@ void riscv_aplic_add_child(DeviceState *parent, DeviceState *child)
/*
* Create APLIC device.
*/
-DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size,
- uint32_t hartid_base, uint32_t num_harts, uint32_t num_sources,
- uint32_t iprio_bits, bool msimode, bool mmode, DeviceState *parent)
+DeviceState *riscv_aplic_create(MemoryRegion *container,
+ hwaddr addr, hwaddr size, uint32_t hartid_base, uint32_t num_harts,
+ uint32_t num_sources, uint32_t iprio_bits, bool msimode, bool mmode,
+ DeviceState *parent)
{
DeviceState *dev = qdev_new(TYPE_RISCV_APLIC);
uint32_t i;
@@ -1137,7 +1138,8 @@ DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size,
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
if (riscv_use_emulated_aplic(msimode)) {
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr);
+ memory_region_add_subregion(container, addr,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
if (!msimode) {
for (i = 0; i < num_harts; i++) {
diff --git a/hw/riscv/aia.c b/hw/riscv/aia.c
index eae7638f97..56fc064533 100644
--- a/hw/riscv/aia.c
+++ b/hw/riscv/aia.c
@@ -72,8 +72,8 @@ DeviceState *riscv_create_aia(MemoryRegion *container,
if (!kvm_enabled()) {
/* Per-socket M-level APLIC */
- aplic_m_dev = riscv_aplic_create(aplic_m->base +
- socket * aplic_m->size,
+ aplic_m_dev = riscv_aplic_create(container,
+ aplic_m->base + socket * aplic_m->size,
aplic_m->size,
(msimode) ? 0 : base_hartid,
(msimode) ? 0 : hart_count,
@@ -83,8 +83,8 @@ DeviceState *riscv_create_aia(MemoryRegion *container,
}
/* Per-socket S-level APLIC */
- aplic_s_dev = riscv_aplic_create(aplic_s->base +
- socket * aplic_s->size,
+ aplic_s_dev = riscv_aplic_create(container,
+ aplic_s->base + socket * aplic_s->size,
aplic_s->size,
(msimode) ? 0 : base_hartid,
(msimode) ? 0 : hart_count,
diff --git a/hw/riscv/cps.c b/hw/riscv/cps.c
index 5cfb54aa27..d2fd9638a0 100644
--- a/hw/riscv/cps.c
+++ b/hw/riscv/cps.c
@@ -135,14 +135,16 @@ static void riscv_cps_realize(DeviceState *dev, Error **errp)
for (i = 0; i < num_of_clusters; i++) {
uint64_t cm_base = GLOBAL_CM_BASE + (CM_SIZE * i);
uint32_t hartid_base = i << MHARTID_CLUSTER_SHIFT;
- s->aplic = riscv_aplic_create(cm_base + AIA_PLIC_M_OFFSET,
+ s->aplic = riscv_aplic_create(get_system_memory(),
+ cm_base + AIA_PLIC_M_OFFSET,
AIA_PLIC_M_SIZE,
hartid_base, /* hartid_base */
MAX_HARTS, /* num_harts */
APLIC_NUM_SOURCES,
APLIC_NUM_PRIO_BITS,
false, true, NULL);
- riscv_aplic_create(cm_base + AIA_PLIC_S_OFFSET,
+ riscv_aplic_create(get_system_memory(),
+ cm_base + AIA_PLIC_S_OFFSET,
AIA_PLIC_S_SIZE,
hartid_base, /* hartid_base */
MAX_HARTS, /* num_harts */
diff --git a/hw/riscv/xiangshan_kmh.c b/hw/riscv/xiangshan_kmh.c
index bb9b1e05ef..a234c5f352 100644
--- a/hw/riscv/xiangshan_kmh.c
+++ b/hw/riscv/xiangshan_kmh.c
@@ -79,13 +79,15 @@ static DeviceState *xiangshan_kmh_create_aia(uint32_t num_harts)
}
/* M-level APLIC */
- aplic_m = riscv_aplic_create(memmap[XIANGSHAN_KMH_APLIC_M].base,
+ aplic_m = riscv_aplic_create(get_system_memory(),
+ memmap[XIANGSHAN_KMH_APLIC_M].base,
memmap[XIANGSHAN_KMH_APLIC_M].size,
0, 0, XIANGSHAN_KMH_APLIC_NUM_SOURCES,
1, true, true, NULL);
/* S-level APLIC */
- riscv_aplic_create(memmap[XIANGSHAN_KMH_APLIC_S].base,
+ riscv_aplic_create(get_system_memory(),
+ memmap[XIANGSHAN_KMH_APLIC_S].base,
memmap[XIANGSHAN_KMH_APLIC_S].size,
0, 0, XIANGSHAN_KMH_APLIC_NUM_SOURCES,
1, true, false, aplic_m);
diff --git a/include/hw/intc/riscv_aplic.h b/include/hw/intc/riscv_aplic.h
index c7a4d4ad01..62d2b33ade 100644
--- a/include/hw/intc/riscv_aplic.h
+++ b/include/hw/intc/riscv_aplic.h
@@ -80,8 +80,9 @@ bool riscv_is_kvm_aia_aplic_imsic(bool msimode);
bool riscv_use_emulated_aplic(bool msimode);
void riscv_aplic_set_kvm_msicfgaddr(RISCVAPLICState *aplic, hwaddr addr);
-DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size,
- uint32_t hartid_base, uint32_t num_harts, uint32_t num_sources,
- uint32_t iprio_bits, bool msimode, bool mmode, DeviceState *parent);
+DeviceState *riscv_aplic_create(MemoryRegion *container,
+ hwaddr addr, hwaddr size, uint32_t hartid_base, uint32_t num_harts,
+ uint32_t num_sources, uint32_t iprio_bits, bool msimode, bool mmode,
+ DeviceState *parent);
#endif