Commit 9082db3e05 for qemu.org

commit 9082db3e05485b422c669b3820d5a6a5dcc831b2
Author: Alex Bennée <alex.bennee@linaro.org>
Date:   Wed Apr 22 13:52:21 2026 +0100

    target/arm: migrate eret trap syndromes to registerfields

    For simplicity keep the OP as a two bit field rather than the two
    interlinked fields in the docs (ERET/ERETA).

    Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
    Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
    Message-id: 20260422125250.1303100-5-alex.bennee@linaro.org
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h
index 72051443d5..63c8e66ea9 100644
--- a/target/arm/syndrome.h
+++ b/target/arm/syndrome.h
@@ -367,12 +367,21 @@ static inline uint32_t syn_sve_access_trap(void)
 }

 /*
+ * ISS encoding for an exception from an ERET, ERETAA or ERETAB
+ * instructions.
+ *
  * eret_op is bits [1:0] of the ERET instruction, so:
  * 0 for ERET, 2 for ERETAA, 3 for ERETAB.
  */
+FIELD(ERET_ISS, OP, 0, 2)
+
 static inline uint32_t syn_erettrap(int eret_op)
 {
-    return (EC_ERETTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL | eret_op;
+    uint32_t res = syn_set_ec(0, EC_ERETTRAP);
+    res = FIELD_DP32(res, SYNDROME, IL, 1);
+    res = FIELD_DP32(res, ERET_ISS, OP, eret_op);
+
+    return res;
 }

 static inline uint32_t syn_smetrap(SMEExceptionType etype, bool is_16bit)