Commit a39d7662cd for qemu.org

commit a39d7662cd1d6bf50b277955dff0d26592a12de9
Author: Jamin Lin <jamin_lin@aspeedtech.com>
Date:   Tue Mar 3 01:33:29 2026 +0000

    hw/i3c/mock-i3c-target: Simplify GETMRL byte extraction logic

    The GETMRL handling logic extracted MSB/LSB bytes from
    s->cfg.buf_size using a mask-and-shift expression:

      (buf_size & (0xff00 >> (offset * 8))) >>
      (8 - (offset * 8))

    While functionally correct, the expression is difficult to read
    and obscures the intent, which is simply to return a 16-bit value
    in MSB-first order.

    Replace the mask/shift formula with explicit MSB/LSB extraction:

      offset == 0 -> buf_size >> 8
      offset == 1 -> buf_size & 0xff

    This makes the code clearer and easier to review without altering
    behavior or data ordering.

    No functional change.

    Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
    Reviewed-by: Jithu Joseph <jithu.joseph@oss.qualcomm.com>
    Link: https://lore.kernel.org/qemu-devel/20260303013322.1297499-5-jamin_lin@aspeedtech.com
    Signed-off-by: Cédric Le Goater <clg@redhat.com>

diff --git a/hw/i3c/mock-i3c-target.c b/hw/i3c/mock-i3c-target.c
index b99709a08b..1ae2cf9e1d 100644
--- a/hw/i3c/mock-i3c-target.c
+++ b/hw/i3c/mock-i3c-target.c
@@ -146,9 +146,12 @@ static int mock_i3c_target_handle_ccc_read(I3CTarget *i3c, uint8_t *data,
             if (s->ccc_byte_offset >= 2) {
                 break;
             }
-            data[s->ccc_byte_offset] = (s->cfg.buf_size &
-                                        (0xff00 >> (s->ccc_byte_offset * 8))) >>
-                                        (8 - (s->ccc_byte_offset * 8));
+            if (s->ccc_byte_offset == 0) {
+                data[s->ccc_byte_offset] = (uint8_t)(s->cfg.buf_size >> 8);
+            } else {
+                data[s->ccc_byte_offset] = (uint8_t)s->cfg.buf_size;
+            }
+
             s->ccc_byte_offset++;
             *num_read = num_to_read;
         }