Commit aa12d98d02 for qemu.org

commit aa12d98d02f05dc2b9600e6762d4ca05e50bf889
Author: Alistair Francis <alistair.francis@wdc.com>
Date:   Thu Mar 12 14:31:53 2026 +1000

    hw/riscv: microchip_pfsoc: Don't call qdev_get_machine in soc init

    Calling qdev_get_machine() in the soc_init function would result in
    the following assert

        ../hw/core/qdev.c:858: qdev_get_machine: Assertion `dev' failed.

    when trying to run

        ./qemu-system-riscv64 -S -display none -M virt -device microchip.pfsoc,help

    as the machine wasn't created yet. We call qdev_get_machine() to obtain
    the number of CPUs in the machine. So instead of setting the CPU
    num-harts in the init function let's set it in realise where the machine
    will exist.

    Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
    Tested-by: Markus Armbruster <armbru@redhat.com>
    Message-ID: <20260312043158.4191378-3-alistair.francis@wdc.com>
    [thuth: Fix a complaint from checkpatch.pl with regards to multi-line comment]
    Signed-off-by: Thomas Huth <thuth@redhat.com>

diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 4ff83e4940..743f31f005 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -143,7 +143,6 @@ static const MemMapEntry microchip_pfsoc_memmap[] = {

 static void microchip_pfsoc_soc_instance_init(Object *obj)
 {
-    MachineState *ms = MACHINE(qdev_get_machine());
     MicrochipPFSoCState *s = MICROCHIP_PFSOC(obj);

     object_initialize_child(obj, "e-cluster", &s->e_cluster, TYPE_CPU_CLUSTER);
@@ -162,7 +161,10 @@ static void microchip_pfsoc_soc_instance_init(Object *obj)

     object_initialize_child(OBJECT(&s->u_cluster), "u-cpus", &s->u_cpus,
                             TYPE_RISCV_HART_ARRAY);
-    qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1);
+    /*
+     * Set the `num-harts` property later as the machine is potentially not
+     * created yet.
+     */
     qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1);
     qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type",
                          TYPE_RISCV_CPU_SIFIVE_U54);
@@ -204,6 +206,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
     int i;

     sysbus_realize(SYS_BUS_DEVICE(&s->e_cpus), &error_abort);
+    qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1);
     sysbus_realize(SYS_BUS_DEVICE(&s->u_cpus), &error_abort);
     /*
      * The cluster must be realized after the RISC-V hart array container,