Commit ae61514df0 for qemu.org

commit ae61514df0d1df6e0635d305ee6faace11d08717
Author: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Date:   Thu Aug 20 12:12:09 2026 +0200

    target/riscv: Constify @iprio argument in riscv_cpu_pending_to_irq()

    @iprio[] is an array only accessed read-only.

    Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
    Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
    Message-Id: <20260901095229.72018-16-philmd@oss.qualcomm.com>

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a13177b7b7..fd1afbc7fe 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -869,7 +869,7 @@ uint8_t riscv_cpu_default_priority(int irq)

 int riscv_cpu_pending_to_irq(CPURISCVState *env,
                              int extirq, unsigned int extirq_def_prio,
-                             uint64_t pending, uint8_t *iprio)
+                             uint64_t pending, const uint8_t *iprio)
 {
     int irq, best_irq = RISCV_EXCP_NONE;
     unsigned int prio, best_prio = UINT_MAX;
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 718b66487a..b974c2f4b4 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -646,7 +646,7 @@ int riscv_cpu_sirq_pending(CPURISCVState *env);
 int riscv_cpu_vsirq_pending(CPURISCVState *env);
 int riscv_cpu_pending_to_irq(CPURISCVState *env,
                              int extirq, unsigned int extirq_def_prio,
-                             uint64_t pending, uint8_t *iprio);
+                             uint64_t pending, const uint8_t *iprio);


 bool riscv_cpu_fp_enabled(CPURISCVState *env);