Commit b5d3ae117b for qemu.org
commit b5d3ae117b8b1c71af4113f24b295959228ecff3
Author: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Date: Fri Aug 28 17:39:13 2026 -0300
hw/riscv/fdt-common, virt.c: add riscv_create_fdt_rtc()
The soon to be added 'riscv-server-ref' board will add a rtc FDT subnode
that is similar to what the 'virt' board users. Put it into a helper to
avoid copy/pasting code.
No FDT changes intended.
Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Chao Liu <chao.liu@processmission.com>
Message-ID: <20260828203918.350131-12-daniel.barboza@oss.qualcomm.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c
index 0107aadaad..ce2dcb43b4 100644
--- a/hw/riscv/fdt-common.c
+++ b/hw/riscv/fdt-common.c
@@ -828,3 +828,24 @@ void riscv_create_fdt_uart(void *fdt, const MemMapEntry *uart_mem,
qemu_fdt_setprop_cells(fdt, name, "interrupts", uart_irq, 0x4);
}
}
+
+void riscv_create_fdt_rtc(void *fdt, const MemMapEntry *rtc_mem,
+ int rtc_irq, int aia_type,
+ uint32_t irq_phandle)
+{
+ g_autofree char *name = NULL;
+
+ name = g_strdup_printf("/soc/rtc@%"HWADDR_PRIx,
+ rtc_mem->base);
+ qemu_fdt_add_subnode(fdt, name);
+ qemu_fdt_setprop_string(fdt, name, "compatible", "google,goldfish-rtc");
+ qemu_fdt_setprop_sized_cells(fdt, name, "reg",
+ 2, rtc_mem->base,
+ 2, rtc_mem->size);
+ qemu_fdt_setprop_cell(fdt, name, "interrupt-parent", irq_phandle);
+ if (aia_type == AIA_TYPE_NONE) {
+ qemu_fdt_setprop_cell(fdt, name, "interrupts", rtc_irq);
+ } else {
+ qemu_fdt_setprop_cells(fdt, name, "interrupts", rtc_irq, 0x4);
+ }
+}
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index ae809ecb5f..3a9d1e0a13 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -435,29 +435,6 @@ static void create_fdt_uarts(RISCVVirtState *s, uint32_t irq_mmio_phandle)
qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name);
}
-static void create_fdt_rtc(RISCVVirtState *s,
- uint32_t irq_mmio_phandle)
-{
- g_autofree char *name = NULL;
- MachineState *ms = MACHINE(s);
-
- name = g_strdup_printf("/soc/rtc@%"HWADDR_PRIx,
- s->memmap[VIRT_RTC].base);
- qemu_fdt_add_subnode(ms->fdt, name);
- qemu_fdt_setprop_string(ms->fdt, name, "compatible",
- "google,goldfish-rtc");
- qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg",
- 2, s->memmap[VIRT_RTC].base,
- 2, s->memmap[VIRT_RTC].size);
- qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
- irq_mmio_phandle);
- if (s->aia_type == VIRT_AIA_TYPE_NONE) {
- qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ);
- } else {
- qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4);
- }
-}
-
static void create_fdt_fw_cfg(RISCVVirtState *s)
{
MachineState *ms = MACHINE(s);
@@ -565,7 +542,8 @@ static void finalize_fdt(RISCVVirtState *s)
create_fdt_uarts(s, irq_mmio_phandle);
- create_fdt_rtc(s, irq_mmio_phandle);
+ riscv_create_fdt_rtc(MACHINE(s)->fdt, &s->memmap[VIRT_RTC], RTC_IRQ,
+ s->aia_type, irq_mmio_phandle);
}
static void create_fdt(RISCVVirtState *s)
diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h
index c8b25348bd..eb9db8278d 100644
--- a/include/hw/riscv/fdt-common.h
+++ b/include/hw/riscv/fdt-common.h
@@ -133,4 +133,7 @@ char *riscv_fdt_get_uart_nodename(hwaddr addr);
void riscv_create_fdt_uart(void *fdt, const MemMapEntry *uart_mem,
int uart_irq, int aia_type,
uint32_t irq_phandle);
+void riscv_create_fdt_rtc(void *fdt, const MemMapEntry *rtc_mem,
+ int rtc_irq, int aia_type,
+ uint32_t irq_phandle);
#endif