Commit b8fff4aef6 for qemu.org
commit b8fff4aef6a21049a298f9abcd854300c4b69e85
Author: Peter Maydell <peter.maydell@linaro.org>
Date: Thu May 28 17:14:48 2026 +0100
target/microblaze: Convert to translate_for_debug
The get_phys_addr_attrs_debug method of SysemuCPUOps is used only by
x86 and microblaze. Convert microblaze to the newer
translate_for_debug method, as a step towards being able to remove
get_phys_addr_attrs_debug.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260528161450.3564396-2-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index c6a456dd5e..a97c92a7b6 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -428,7 +428,7 @@ static ObjectClass *mb_cpu_class_by_name(const char *cpu_model)
static const struct SysemuCPUOps mb_sysemu_ops = {
.has_work = mb_cpu_has_work,
- .get_phys_addr_attrs_debug = mb_cpu_get_phys_addr_attrs_debug,
+ .translate_for_debug = mb_cpu_translate_for_debug,
};
#endif
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 068da60529..b9602f72b9 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -369,8 +369,8 @@ struct MicroBlazeCPUClass {
#ifndef CONFIG_USER_ONLY
void mb_cpu_do_interrupt(CPUState *cs);
bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
-hwaddr mb_cpu_get_phys_addr_attrs_debug(CPUState *cpu, vaddr addr,
- MemTxAttrs *attrs);
+bool mb_cpu_translate_for_debug(CPUState *cs, vaddr addr,
+ TranslateForDebugResult *result);
#endif /* !CONFIG_USER_ONLY */
G_NORETURN void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
MMUAccessType access_type,
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 3434ea47e8..6a982c18c0 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -280,8 +280,8 @@ void mb_cpu_do_interrupt(CPUState *cs)
}
}
-hwaddr mb_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr,
- MemTxAttrs *attrs)
+bool mb_cpu_translate_for_debug(CPUState *cs, vaddr addr,
+ TranslateForDebugResult *result)
{
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
hwaddr paddr = 0;
@@ -289,10 +289,6 @@ hwaddr mb_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr,
int mmu_idx = cpu_mmu_index(cs, false);
unsigned int hit;
- /* Caller doesn't initialize */
- *attrs = (MemTxAttrs) {};
- attrs->secure = mb_cpu_access_is_secure(cpu, MMU_DATA_LOAD);
-
if (mmu_idx != MMU_NOMMU_IDX) {
hit = mmu_translate(cpu, &lu, addr, 0, 0);
if (hit) {
@@ -303,7 +299,13 @@ hwaddr mb_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr,
paddr = addr;
}
- return paddr;
+ *result = (TranslateForDebugResult) {
+ .physaddr = paddr,
+ .lg_page_size = TARGET_PAGE_BITS,
+ .attrs.secure = mb_cpu_access_is_secure(cpu, MMU_DATA_LOAD),
+ .attrs.debug = 1,
+ };
+ return true;
}
bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)