Commit c1c58cee16 for qemu.org
commit c1c58cee16380f81f88fbde6b12f247b376839e2
Merge: beaeffb57c 4efed64ffc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Fri Jan 16 09:33:20 2026 +1100
Merge tag 'pull-target-arm-20260115' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* hw/arm/raspi: remove duplicate include
* target/arm: Enable FEAT_ASID2 emulation
* hw/char/cmsdk-apb-uart.c: log guest_errors for r/w to disabled uart
* hw/arm: Re-enable the MAX78000FTHR machine in qemu-system-arm/aarch64
* target/arm/ptw: make granule_protection_check usable without a cpu
* hw/arm/omap: Remove omap_badwidth_* functions
* hw/arm/smmu: add memory regions as property for an SMMU instance
* docs/system/generic-loader: clarify
* tests/functional: migrate aspeed_rainier image
* target/arm: Correctly handle HCR.TID1 and TID3 traps on v7A CPUs
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# gpg: Signature made Fri 16 Jan 2026 05:53:05 AM AEDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260115' of https://gitlab.com/pm215/qemu: (25 commits)
target/arm: Rename access_aa64_tid5() to access_tid5()
target/arm: Correctly trap HCR.TID1 registers in v7A
target/arm: Correctly honour HCR.TID3 for v7A cores
target/arm: Don't specify ID_PFR1 accessfn twice
tests/functional: migrate aspeed_rainier image
docs/system/generic-loader: move TODO to source code
docs/system/generic-loader: Don't mention QemuOpts implementation detail
docs/system/generic-loader: Clarify behaviour of cpu-num
hw/arm/smmu: add memory regions as property for an SMMU instance
hw/arm/omap1: Remove omap_badwidth_* implementations
hw/arm/omap1: Remove omap_badwidth_write* calls
hw/arm/omap1: Remove omap_badwidth_read* calls
hw/dma/omap_dma: Remove omap_badwidth_* calls
hw/gpio/omap_gpio: Remove omap_badwidth_* calls
hw/i2c/omap_i2c: Remove omap_badwidth_* calls
hw/sd/omap_mmc: Remove omap_badwidth_* calls
target/arm/ptw: make granule_protection_check usable without a cpu
target/arm: Move ARMSecuritySpace to a common header
hw/arm: Re-enable the MAX78000FTHR machine in qemu-system-arm/aarch64
hw/char/cmsdk-apb-uart.c: log guest_errors for r/w to disabled uart
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>