Commit c58ab7cf21 for qemu.org

commit c58ab7cf21fa98ba3d2a24685817d69763173d10
Author: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Date:   Wed Dec 17 16:17:26 2025 -0300

    MAINTAINERS: update my email

    Also add myself as a "RISC-V TCG target" reviewer.

    Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
    Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
    Message-ID: <20251217191726.194767-1-daniel.barboza@oss.qualcomm.com>
    Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 97f2759138..62fb18d125 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -341,7 +341,7 @@ RISC-V TCG CPUs
 M: Palmer Dabbelt <palmer@dabbelt.com>
 M: Alistair Francis <alistair.francis@wdc.com>
 R: Weiwei Li <liwei1518@gmail.com>
-R: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
+R: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
 R: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
 L: qemu-riscv@nongnu.org
 S: Supported
@@ -4134,6 +4134,7 @@ F: tcg/ppc64/
 RISC-V TCG target
 M: Palmer Dabbelt <palmer@dabbelt.com>
 M: Alistair Francis <Alistair.Francis@wdc.com>
+R: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
 L: qemu-riscv@nongnu.org
 S: Maintained
 F: tcg/riscv64/