Commit e1824a1042 for qemu.org

commit e1824a10423c790a70176faff0066f5e6a2be479
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date:   Tue Feb 17 17:02:23 2026 +0100

    target/sh4: Expand gdb_get_regl() -> gdb_get_reg32()

    The SH4 targets are only built as 32-bit:

      $ git grep TARGET_LONG_BITS configs/targets/sh4*
      configs/targets/sh4-linux-user.mak:5:TARGET_LONG_BITS=32
      configs/targets/sh4-softmmu.mak:2:TARGET_LONG_BITS=32
      configs/targets/sh4eb-linux-user.mak:6:TARGET_LONG_BITS=32
      configs/targets/sh4eb-softmmu.mak:3:TARGET_LONG_BITS=32

    Mechanically replace:

      gdb_get_regl() -> gdb_get_reg32()

    Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
    Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
    Message-ID: <20260219191955.83815-36-philmd@linaro.org>

diff --git a/target/sh4/gdbstub.c b/target/sh4/gdbstub.c
index 75926d4e04..4f36e800d2 100644
--- a/target/sh4/gdbstub.c
+++ b/target/sh4/gdbstub.c
@@ -31,43 +31,43 @@ int superh_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
     switch (n) {
     case 0 ... 7:
         if ((env->sr & (1u << SR_MD)) && (env->sr & (1u << SR_RB))) {
-            return gdb_get_regl(mem_buf, env->gregs[n + 16]);
+            return gdb_get_reg32(mem_buf, env->gregs[n + 16]);
         } else {
-            return gdb_get_regl(mem_buf, env->gregs[n]);
+            return gdb_get_reg32(mem_buf, env->gregs[n]);
         }
     case 8 ... 15:
-        return gdb_get_regl(mem_buf, env->gregs[n]);
+        return gdb_get_reg32(mem_buf, env->gregs[n]);
     case 16:
-        return gdb_get_regl(mem_buf, env->pc);
+        return gdb_get_reg32(mem_buf, env->pc);
     case 17:
-        return gdb_get_regl(mem_buf, env->pr);
+        return gdb_get_reg32(mem_buf, env->pr);
     case 18:
-        return gdb_get_regl(mem_buf, env->gbr);
+        return gdb_get_reg32(mem_buf, env->gbr);
     case 19:
-        return gdb_get_regl(mem_buf, env->vbr);
+        return gdb_get_reg32(mem_buf, env->vbr);
     case 20:
-        return gdb_get_regl(mem_buf, env->mach);
+        return gdb_get_reg32(mem_buf, env->mach);
     case 21:
-        return gdb_get_regl(mem_buf, env->macl);
+        return gdb_get_reg32(mem_buf, env->macl);
     case 22:
-        return gdb_get_regl(mem_buf, cpu_read_sr(env));
+        return gdb_get_reg32(mem_buf, cpu_read_sr(env));
     case 23:
-        return gdb_get_regl(mem_buf, env->fpul);
+        return gdb_get_reg32(mem_buf, env->fpul);
     case 24:
-        return gdb_get_regl(mem_buf, env->fpscr);
+        return gdb_get_reg32(mem_buf, env->fpscr);
     case 25 ... 40:
         if (env->fpscr & FPSCR_FR) {
             return gdb_get_reg32(mem_buf, env->fregs[n - 9]);
         }
         return gdb_get_reg32(mem_buf, env->fregs[n - 25]);
     case 41:
-        return gdb_get_regl(mem_buf, env->ssr);
+        return gdb_get_reg32(mem_buf, env->ssr);
     case 42:
-        return gdb_get_regl(mem_buf, env->spc);
+        return gdb_get_reg32(mem_buf, env->spc);
     case 43 ... 50:
-        return gdb_get_regl(mem_buf, env->gregs[n - 43]);
+        return gdb_get_reg32(mem_buf, env->gregs[n - 43]);
     case 51 ... 58:
-        return gdb_get_regl(mem_buf, env->gregs[n - (51 - 16)]);
+        return gdb_get_reg32(mem_buf, env->gregs[n - (51 - 16)]);
     }

     return 0;